Semiconductor Package Sidewall Geometry for Void-Free Underfill

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Solution Overview

Problem

Conventional semiconductor packaging methods face challenges in achieving uniform underfill layer formation, leading to voids and reduced mechanical stability due to constant lateral dimensions between semiconductor devices, which affect the reliability and performance of the package.

Innovation Solution

The semiconductor package design incorporates a redistribution structure with semiconductor devices having inclined side surfaces and a unique underfill layer formation process where the space between devices has decreasing lateral dimensions, improving the uniformity of the underfill layer flow and preventing voids.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional semiconductor packaging methods with constant lateral dimensions between devices are used, then the manufacturing process is simple, but the underfill layer formation is non-uniform leading to voids and reduced mechanical stability

Engineering Contradiction:

Improveuniformity of underfill layer formationVSAvoidstructure of space between devices

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by designing the space between semiconductor devices with non-constant lateral dimensions. Specifically, the space has a first lateral dimension at a first location that differs from a second lateral dimension at a second location, creating an asymmetric geometry that promotes uniform underfill layer formation and eliminates voids while maintaining manufacturing feasibility

Inventive Principle:

Principle #4Asymmetry

2Reliability

If conventional packaging with constant lateral dimensions is used, then the device structure is simple, but voids form in the underfill layer reducing reliability

Engineering Contradiction:

Improvemechanical stability of packageVSAvoidgeometry of inter-device space

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The asymmetric space geometry with varying lateral dimensions prevents void formation in the underfill layer, thereby improving the mechanical stability and reliability of the semiconductor package without requiring excessive structural complexity

Inventive Principle:

Principle #4Asymmetry

3Manufacturing precision

If inclined side surfaces are implemented on semiconductor devices, then underfill layer uniformity improves, but the manufacturing process becomes more complex

Engineering Contradiction:

Improveuniformity of underfill layerVSAvoidprocess of forming device surfaces

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The inclined side surfaces create an asymmetric space geometry that naturally guides underfill material flow, ensuring uniform layer formation. This geometric modification, while adding some manufacturing steps, achieves significant improvement in underfill quality and package reliability

Inventive Principle:

Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the mechanical stability and reliability of the semiconductor package by ensuring uniform underfill layer formation and reducing voids, thereby improving the overall performance and yield.

Implementation Method 1

the space between the first semiconductor device and the second semiconductor device has lateral dimensions that decrease continuously along a direction from the front surfaces to the back surfaces, improving the uniformity of the underfill layer flow

Methodology Applied

Scientific EffectCapillary action: Capillary Action

Data Source

PatentUS11854929B2Semiconductor package and method of forming the same

Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface. The second semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the second semiconductor device has a second bottom surface, a second top surface and a second side surface connecting with the second bottom surface and the second top surface, the second side surface faces toward to the first side surface, the second side surface comprises a third sub-surface and a fourth sub-surface connected with each other, the third sub-surface is connected with the second bottom surface, and a second obtuse angle is between the third sub-surface and the fourth sub-surface. The underfill layer is between the first semiconductor device and the second semiconductor device, between the first semiconductor device and the redistribution structure, and between the second semiconductor device and the redistribution structure. The encapsulant encapsulates the first semiconductor device, the second semiconductor device and the underfill layer.