Multi-Chip Semiconductor Package Vertical Stacking Design
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Solution Overview
Problem
In multi-chip semiconductor devices, the stacking of resin-sealed packages limits low-profiling and increases package thickness, while the adhesiveness between resin layers is poor, leading to peeling and reduced structural reliability.
Innovation Solution
A semiconductor device design where a second semiconductor package is mounted on a first interposer using flip-chip bonding, with an adhesive and underfill material, and sealed with a molding resin that minimizes resin thickness and improves adhesiveness, allowing for low-profiled packaging and enhanced reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If resin-sealed packages are stacked to create multi-chip package type semiconductor devices, then the mounting density of semiconductor chips can be increased, but the package thickness increases and low-profiling becomes difficult
Solution Approach 1:
The patent transitions from horizontal stacking of resin-sealed packages to vertical stacking of chip structures on a common substrate. By mounting multiple chip structures vertically on the same substrate in the thickness direction, the design achieves high mounting density while maintaining low package thickness, effectively resolving the contradiction between productivity and package dimension.
2Productivity
If resin-sealed packages are stacked, then semiconductor devices can be manufactured with improved yield, but the adhesiveness between resin layers deteriorates leading to peeling
Solution Approach 1:
The patent extracts the sealing function from intermediate resin layers and replaces it with a rigid substrate structure. By mounting chip structures directly on a substrate without intermediate resin sealing layers, the design eliminates the peeling issue while maintaining the ability to manufacture high-yield multi-chip devices.
Solution Approach 2:
The patent segments the package into independent chip structures mounted on a common substrate, with each chip structure containing its own sealing resin. This segmentation eliminates the need for intermediate resin layers between packages, thereby preventing peeling while allowing high-yield manufacturing of multi-chip devices.
3Productivity
If multiple semiconductor packages are mounted in a stacked manner, then the mounting density can be increased, but the structural reliability deteriorates due to poor adhesiveness
Solution Approach 1:
The patent achieves high mounting density by stacking chip structures vertically on a common substrate rather than horizontally stacking resin-sealed packages. This dimensional change eliminates intermediate resin layers that cause poor adhesiveness, thereby maintaining structural reliability while increasing mounting density.
Solution Approach 2:
The substrate is prepared in advance with mounting surfaces and electrical connections before chip structures are mounted. This preliminary preparation ensures strong mechanical and electrical bonding, improving structural reliability while enabling high-density vertical stacking of multiple chips.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves reduced package thickness, improved adhesiveness, and increased reliability by eliminating resin-sealed limitations, allowing for higher design flexibility and stability in multi-chip semiconductor devices.
Implementation Method 1
A first molding resin is provided on the upper surface of the first interposer, which seals the first semiconductor package. A second molding resin, provided on the upper surface of the first interposer, seals the first molding resin, the second semiconductor chip, and the second interposer.
Implementation Method 2
A second semiconductor package is mounted on an upper surface of the first molding resin. The second semiconductor package is mounted on a first semiconductor package via an adhesive.
Data Source
AI summary
A semiconductor device 100 includes: a first semiconductor package 10; a first interposer 12 having an upper surface on which the first semiconductor package 10 is mounted; a first molding resin 14 that is provided on the upper surface of the first interposer 12 and seals the first semiconductor package 10; a second semiconductor package 20 mounted on an upper surface of the first molding resin 14; a second interposer 22 on which the second semiconductor package 20 is mounted by flip chip bonding; and a second molding resin 40 that is provided on the upper surface of the first interposer 12 and seals the first molding resin 14, the second semiconductor package 20, and the second interposer 22. The second semiconductor package 20 is mounted, with a surface thereof opposite to another surface mounted on the second interposer 22 faced down, on the upper surface of the first molding resin 14 via an adhesive 30.