Semiconductor Package Via Geometry for Reliable Terminal Contact

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Solution Overview

Problem

Conventional semiconductor packages face reliability issues due to inadequate connection characteristics between conductive terminals and redistribution patterns, leading to potential contact failures during thermal treatment processes.

Innovation Solution

The semiconductor package incorporates an under-bump pattern with a via portion and a wire portion, where the bottom surface of the via portion has a curved recessed shape, enhancing alignment and contact with conductive terminals, and includes a redistribution substrate with insulating layers and redistribution patterns to improve connection reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional bonding methods are used to connect semiconductor chips to PCBs, then the basic electrical connection is achieved, but the reliability deteriorates due to inadequate connection characteristics between conductive terminals and redistribution patterns during thermal treatment

Engineering Contradiction:
Improveconnection reliabilityVSAvoidalignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The via portion of the under-bump pattern is formed with a curved bottom surface instead of a flat surface. This curvature allows the conductive terminal to make contact with a larger area of the via portion during thermal treatment, compensating for dimensional changes and misalignment. The curved surface ensures that even when the under-bump pattern shrinks, the conductive terminal maintains reliable electrical connection with the redistribution pattern.

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Area of stationary object

If the under-bump pattern is made smaller to improve integration density, then the area occupied is reduced, but the connection characteristics deteriorate due to increased shrinkage during thermal treatment

Engineering Contradiction:
Improvearea of under-bump patternVSAvoidconnection stability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

By forming the via portion with a curved bottom surface, the patent enables smaller under-bump patterns to maintain reliable connections despite greater proportional shrinkage during thermal treatment. The curved surface provides a tolerance buffer that allows the conductive terminal to remain in contact with the via portion even when the pattern dimensions change, thus enabling high integration density without sacrificing connection reliability.

Inventive Principle:
Principle #14Spheroidality (Curvature)

3Reliability

If the under-bump pattern is made larger to improve connection characteristics, then the connection area is increased, but the device complexity increases due to larger overall package size

Engineering Contradiction:
Improveconnection characteristicsVSAvoidpackage volume
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The curved bottom surface of the via portion allows the under-bump pattern to maintain excellent connection characteristics with a compact size. The curvature provides enhanced contact area and tolerance to dimensional changes, eliminating the need to increase the overall pattern size to achieve reliable connections. This enables small package volume while maintaining high connection reliability.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Data Source

PatentUS20250105116A1Semiconductor package
Publication Date: 2025.03.27 SAMSUNG ELECTRONICS CO LTD
  • US20250105116A1 patent drawing
  • US20250105116A1 patent drawing
  • US20250105116A1 patent drawing

AI summary

A semiconductor package may include a redistribution substrate, a semiconductor chip mounted on a top surface of the redistribution substrate, and a conductive terminal provided on a bottom surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern including a via portion in contact with the conductive terminal and a wire portion on the via portion and an insulating layer covering top and side surfaces of the under-bump pattern. A central portion of a bottom surface of the via portion may be provided at a level higher than an edge portion of the bottom surface of the via portion.