Thermally Conductive Via Plugs for Semiconductor Package Heat Dissipation
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Solution Overview
Problem
Semiconductor chips face challenges in heat dissipation due to the low thermal conductivity of insulating materials used for protection, making it difficult to effectively dissipate the heat generated.
Innovation Solution
The method involves mounting semiconductor chips on a package substrate, forming a molding member, creating via holes in a lattice shape to expose thermal pads, and filling these holes with thermally conductive via plugs, which are connected by sub-plugs to enhance heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If insulating material is used to seal the semiconductor chip, then the chip is protected from external damage, but heat dissipation becomes difficult due to low thermal conductivity
Solution Approach 1:
The molding member is segmented with multiple via holes distributed throughout its structure, dividing the heat dissipation function into multiple discrete thermal pathways rather than relying on a single method. This segmentation allows the insulating molding material to maintain its protective function while incorporating distributed thermal conduction channels.
Solution Approach 2:
Thermally conductive via plugs are introduced as intermediary elements between the semiconductor chip's thermal pads and the external environment. These via plugs serve as mediators that bridge the thermal gap created by the insulating molding material, providing a dedicated heat conduction path while the molding member continues to provide mechanical protection.
2Temperature
If via holes are formed to improve heat dissipation, then thermal conductivity improves, but the structural integrity of the molding member may be compromised
Solution Approach 1:
The molding member is constructed as a composite structure combining the insulating molding material with thermally conductive via plugs. This composite approach allows the base material to maintain its protective and insulating properties while the embedded conductive elements provide thermal pathways without requiring large voids that would compromise structural integrity.
Solution Approach 2:
The via holes and thermally conductive plugs are strategically positioned in specific locations where heat dissipation is most needed, rather than uniformly distributing large openings throughout the molding member. This localized approach to heat management minimizes the impact on overall structural strength while maximizing thermal performance in critical areas.
3Temperature
If multiple via holes are formed in lattice shape, then heat transmission path increases, but manufacturing complexity increases
Solution Approach 1:
The via holes serve multiple functions simultaneously: they provide thermal conduction pathways, act as alignment features for the molding process, and create a lattice structure that maintains structural integrity while enabling heat dissipation. This multi-functionality reduces the need for additional separate features, simplifying the overall manufacturing process despite the complex pattern.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves heat dissipation by increasing the contact area and creating a more extensive heat transmission path, effectively managing heat generated by the semiconductor chips.
Implementation Method 1
forming thermally conductive via plugs in the via holes
Implementation Method 2
reflowing the thermally conductive materials to fill the plurality of holes with thermally conductive via plugs
Data Source
AI summary
Provided are a semiconductor package of a semiconductor chip, a semiconductor module, an electronic system, and methods of manufacturing the same. The method includes mounting a semiconductor chip on a package substrate, forming a molding member on the semiconductor chip, forming via holes penetrating the molding member to expose a portion of a top surface of the semiconductor chip, the via holes being arranged in a lattice shape in a plan view, and forming thermally conductive via plugs in the via holes.