Semiconductor Package Via Structure for Lower PoP Routing Density
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Solution Overview
Problem
Current Package-on-Package (PoP) technology faces challenges in signal routing density and reliability due to the need for signals to pass through a high-density front-side redistribution layer (RDL) in the middle semiconductor package, compromising the package's structural integrity.
Innovation Solution
The implementation of a semiconductor package with a through encapsulant via and a TSV that allows for direct signal transmission between the top and bottom semiconductor packages, reducing the reliance on the front-side RDL and enhancing package reliability by providing an alternative path for signals through the TSV and through encapsulant via.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If signals are routed through the front-side redistribution layer (RDL) of the middle semiconductor package, then signal transmission between packages is achieved, but the routing density requirement becomes very high and package reliability is compromised
Solution Approach 1:
The patent divides the signal transmission path into multiple segments: back-side RDL on the middle package, through-package vias, and front-side RDL. This segmentation allows signals to be routed through different layers and paths, reducing the routing density burden on any single layer while maintaining reliable signal transmission between packages.
Solution Approach 2:
The patent utilizes the third dimension (vertical depth) by implementing through-package vias that penetrate the middle semiconductor package. This vertical dimension provides additional routing paths beyond the traditional planar front-side RDL, thereby reducing the required routing density on any single layer and improving overall package reliability.
2Ease of operation
If high routing density is implemented in the front-side RDL, then signal transmission between packages is enabled, but structural integrity is compromised
Solution Approach 1:
The signal transmission function is segmented across multiple structures: back-side RDL, through-package vias, and front-side RDL. This distribution of routing functions reduces the concentration of signal lines in any single region, thereby maintaining structural integrity while enabling comprehensive signal transmission capability.
Solution Approach 2:
By adding the vertical dimension through through-package vias, the patent creates additional signal transmission pathways that do not congest the planar RDL structures. This three-dimensional routing approach enables full signal transmission capability while preserving the structural integrity of each individual layer.
3Productivity
If direct signal transmission path is created through TSV and through encapsulant via, then signal transmission efficiency is improved, but manufacturing process complexity increases
Solution Approach 1:
The through encapsulant vias and TSVs are formed during the encapsulation process itself, rather than as separate post-processing steps. The encapsulant material is deposited to form the encapsulant body, and through-vias are simultaneously created within it. This preliminary action integrates the via formation into the encapsulation process, reducing overall manufacturing complexity while enabling direct signal transmission paths that improve efficiency.
Solution Approach 2:
The patent merges the encapsulation function with the via formation function. The encapsulant serves dual purposes: protecting the semiconductor die and providing integrated through-vias for signal transmission. This consolidation of functions reduces the number of separate manufacturing steps required, thereby improving signal transmission efficiency without proportionally increasing manufacturing process complexity.
Data Source
AI summary
A manufacturing method of a semiconductor package is provided as follows. A semiconductor die is provided, wherein the semiconductor die comprises a semiconductor substrate, an interconnection layer and a through semiconductor via, the interconnection layer is disposed on an active surface of the semiconductor substrate, the through semiconductor via penetrates the semiconductor substrate from a back surface of the semiconductor substrate to the active surface of the semiconductor substrate. An encapsulant is provided to laterally encapsulate the semiconductor die. A through encapsulant via penetrating through the encapsulant is formed.