Semiconductor Package Terminal Layout for Visible Board Mounting
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Solution Overview
Problem
In semiconductor devices with Wafer Level-Chip Size Package (WL-CSP), it is difficult to visually confirm the mounting state after the device is mounted to a mounting board due to the arrangement of electrodes in a grid pattern.
Innovation Solution
A semiconductor device with a semiconductor element and an electrode structure where metal terminals are disposed along the circumference of the semiconductor element's surface, exposed from a sealing resin, allowing easy visual confirmation of the mounted state. The electrode structure includes a first surface opposed to the semiconductor element, a second surface on the opposite side, and a third surface continuous with the second surface, with the metal terminals electrically connected to electrode pads and held by the sealing resin.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If electrodes are arranged in a grid pattern on the electrode formation surface, then the semiconductor device achieves compact size and proper electrical connection, but it becomes difficult to visually confirm the mounting state after mounting to a mounting board
Solution Approach 1:
The patent transitions the electrode arrangement from a two-dimensional grid pattern on the chip surface to a three-dimensional configuration where metal terminals extend vertically from the chip surface and are exposed on the side surface of the sealing resin. This dimensional change allows the terminals to be visible from the side, enabling visual confirmation of mounting state while maintaining the compact grid arrangement for electrical connections.
Solution Approach 2:
The metal terminals serve as an intermediary element that connects the internal grid-patterned electrode pads to the external environment. By extending these terminals through the sealing resin and exposing them on the side surface, the patent creates a visible interface that mediates between the hidden internal electrode structure and the external mounting board, allowing visual verification of mounting without disrupting the compact electrode design.
2Difficulty of detecting and measuring
If metal terminals are exposed from the sealing resin on the side surface, then visual confirmation of mounting state becomes easy, but the device structure becomes more complex
Solution Approach 1:
The metal terminals perform multiple functions simultaneously: they provide electrical connection between the electrode pads and mounting board, serve as visible indicators for mounting state verification, and act as structural anchors for the sealing resin. By making the terminals multi-functional, the patent avoids adding separate components for each function, thereby minimizing the increase in device complexity while achieving visual confirmability.
Solution Approach 2:
The patent merges the electrical connection function and the visual indication function into a single structural element - the metal terminal. Instead of having separate hidden electrodes and separate visible indicators, the terminal structure combines both roles, eliminating the need for additional components and reducing overall device complexity despite the enhanced visibility feature.
3Reliability
If metal terminals are disposed along the circumference and exposed from sealing resin, then mounting reliability improves due to reduced wiring resistance and enhanced mounting strength, but manufacturing process becomes more complex
Solution Approach 1:
The patent incorporates the metal terminals into the chip structure before the sealing resin is applied. By forming the terminals on the electrode pads first, then molding the sealing resin around them, the positioning and alignment are predetermined and fixed in advance. This preliminary action eliminates the need for complex post-assembly adjustments and simplifies the manufacturing process despite the enhanced mounting reliability achieved through the exposed terminal configuration.
Data Source
AI summary
The semiconductor device according to the present invention comprises; a semiconductor element having one surface with a plurality of electrode pads; an electrode structure including a plurality of metal terminals and a sealing resin. The plurality of metal terminals being disposed in a region along a circumference of the one surface. The sealing resin holding the plurality of metal terminals and being disposed on the one surface of the semiconductor element. The electrode structure includes a first surface opposed to the one surface of the semiconductor element, a second surface positioned in an opposite side of the first surface, and a third surface positioned between the first surface and the second surface. Each of the plurality of metal terminals is exposed from the sealing resin in at least a part of the second surface and at least a part of the third surface.