Semiconductor Package Warp Reduction via Core Substrate Design

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Solution Overview

Problem

Conventional semiconductor package manufacturing methods result in warping due to stress release when the support substrate is removed, as the high stiffness of the substrate does not allow for adequate flexibility, leading to uneven thermal expansion and mechanical imbalance.

Innovation Solution

A semiconductor package design incorporating a core substrate made of reinforcement-containing insulating resin, with a metal plate and conductive layer configuration that balances thermal expansion coefficients, and a manufacturing method that includes forming openings in the core substrate to house the semiconductor chip, ensuring symmetrical distribution of physical values and reducing warp.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a support substrate with high stiffness is used to maintain structural stability during manufacturing, then the semiconductor chip can be properly supported and wired, but warp occurs when the support substrate is removed due to stress release

Engineering Contradiction:
Improvestructural stabilityVSAvoidwarp
Core Design Contradiction:
StrengthVSShape

Solution Approach 1:

The invention extracts the support substrate from the final package structure, using it only temporarily during manufacturing. The core substrate is designed to function independently without the support substrate, eliminating the warp caused by stress release when the support substrate is removed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The core substrate uses a composite structure combining resin material with reinforcement fibers (glass, aramid, or carbon fibers). This composite material provides both the mechanical strength needed during manufacturing and the dimensional stability required in the final package, eliminating the need for a separate support substrate.

Inventive Principle:
Principle #40Composite materials

2Strength

If a thick metal plate is used to prevent warp and provide mechanical support, then structural integrity is improved, but the total package thickness increases

Engineering Contradiction:
Improvemechanical supportVSAvoidpackage thickness
Core Design Contradiction:
StrengthVSLength of stationary object

Solution Approach 1:

The invention optimizes the metal plate thickness parameter to a specific range (5-20 μm) that provides sufficient mechanical support and thermal expansion balancing without excessive thickness. The reinforcement-containing core substrate compensates for the thin metal plate, maintaining structural integrity while minimizing overall package thickness.

Inventive Principle:
Principle #35Parameter changes

3Stability of the object's composition

If the metal plate thickness is increased to balance thermal expansion, then thermal stability is improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvethermal expansion balanceVSAvoidmanufacturing complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The invention sets the metal plate thickness within an optimal range (5-20 μm) that achieves thermal expansion balance without requiring excessive thickness. This parameter optimization simplifies manufacturing by avoiding the need for thick metal plates while maintaining thermal stability.

Inventive Principle:
Principle #35Parameter changes

4Strength

If a reinforcement-containing insulating resin is used for the core substrate, then mechanical strength and warp resistance are improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvewarp resistanceVSAvoidopening alignment
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The invention divides the core substrate into regions with different properties: a first opening for the semiconductor chip and a second opening for the metal plate. This segmentation allows independent optimization of each opening's positioning and sizing, reducing the overall manufacturing precision requirements while maintaining warp resistance through the reinforcement structure.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively minimizes warp in the semiconductor package by balancing thermal expansion and mechanical strength, reducing manufacturing costs by eliminating the need for a support substrate and enhancing the mechanical integrity of the package.

Implementation Method 1

balances thermal expansion coefficients

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

core substrate made of reinforcement-containing insulating resin

Methodology Applied
Scientific EffectComposite materials: Composite Materials

Data Source

PatentUS8941230B2Semiconductor package and manufacturing method
Publication Date: 2015.01.27 SHINKO ELECTRIC IND CO LTD
  • US8941230B2 patent drawing
  • US8941230B2 patent drawing
  • US8941230B2 patent drawing

AI summary

A metal plate covers an opening on the upper surface of a core substrate and exposes an outer edge of the upper surface of the core substrate. A conductive layer covers the lower surface of the core substrate. A semiconductor chip bonded to a first surface of the metal plate is exposed through the opening. A first insulating layer covers the upper and side surface of the metal plate and the outer edge of the upper surface of the core substrate. A second insulating layer fills the openings of the metal plate and the conductive layer and covers the outer edge of the lower surface of the core substrate, the conductive layer, and the semiconductor chip. The metal plate is thinner than the semiconductor chip. Total thickness of the conductive layer and the core substrate is equal to or larger than the thickness of the semiconductor chip.