High-Frequency Semiconductor Package Layout for Warp-Stable Signal Paths
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Solution Overview
Problem
In high-frequency modules, warping due to thermal expansion differences between the IC chip and the insulating layer can lead to varying transmission distances between elements, causing inconsistencies in signal transmission.
Innovation Solution
A semiconductor package design with an IC chip surrounded by a molded resin, an insulating layer, and redistribution wirings, where high-frequency solder bumps are disposed equidistant from the center of the molded resin to maintain consistent transmission distances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the semiconductor package uses an insulating layer and molded resin with different thermal expansion coefficients, then the package can be manufactured with standard materials, but warping occurs during soldering causing variation in transmission distance
Solution Approach 1:
The patent applies asymmetry by strategically positioning high-frequency bumps at specific locations that are equidistant from the center of the molded resin, rather than distributing them uniformly. This asymmetric arrangement compensates for warping effects that occur during soldering, ensuring that transmission distances remain consistent despite package deformation. The asymmetric placement allows the design to account for and counteract the non-uniform warping that naturally occurs.
Solution Approach 2:
The patent changes the positional parameters of high-frequency bumps relative to the package center, placing them at calculated distances that compensate for expected warping. By adjusting these positional parameters based on thermal expansion characteristics, the design maintains consistent transmission distances even when the package warps during the soldering process.
2Device complexity
If the semiconductor package structure is simplified, then manufacturing cost decreases, but transmission distance control becomes difficult due to warping
Solution Approach 1:
The patent applies local quality by focusing precision requirements only on the high-frequency bump locations rather than the entire package structure. The simplified overall structure is maintained, but specific local areas (where high-frequency bumps are placed) are designed with precise positioning relative to the center. This allows transmission distance control without requiring complex structures throughout the entire package.
3Manufacturing precision
If high-frequency bumps are positioned to compensate for warping, then transmission distance consistency improves, but the design complexity increases
Solution Approach 1:
The patent creates equipotential conditions by positioning high-frequency bumps at equal distances from the center of the molded resin. This symmetric arrangement relative to the center ensures that all high-frequency signal paths experience similar warping effects, maintaining consistent transmission distances. The equipotential approach simplifies the design compared to complex asymmetric compensation while achieving the desired precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively suppresses differences in transmission distance caused by warping, ensuring reliable and consistent high-frequency signal transmission.
Implementation Method 1
a plurality of solder bumps connected to the IC chip via redistribution wirings
Implementation Method 2
a plurality of redistribution wirings formed in the insulating layer and connecting the IC chip to the plurality of solder bumps
Data Source
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AI summary
A semiconductor package includes an IC chip, a molded resin, an insulating layer, a plurality of solder bumps, and a plurality of redistribution wirings. The IC chip has a first surface. The molded resin surrounds the IC chip in a plan viewing, has a rectangular or square outer shape in the plan viewing, and has a second surface facing the same direction as the first surface. The insulating layer is formed on the first surface and the second surface. The plurality of solder bumps are formed on the insulating layer. The plurality of redistribution wirings are formed in the insulating layer and connect the IC chip to the plurality of solder bumps. The plurality of solder bumps include a plurality of high-frequency bumps which are connected to high-frequency terminals of the IC chip and through which the same type of high-frequency signal flows. The plurality of high-frequency bumps are disposed at equal distances from a center of the molded resin in the plan viewing.