Semiconductor Package Assembly to Prevent Wafer Warpage

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Solution Overview

Problem

Conventional methods for forming electronic packages with stacked components using organic and inorganic materials with different thermal expansion coefficients are inadequate, leading to warpage deformation issues.

Innovation Solution

A semiconductor device manufacturing method that involves forming an interposer with a redistribution layer and dielectric layer, connecting contact structures, attaching a wafer support system, and encapsulating the semiconductor die, while arranging encapsulating processes to prevent warpage deformation due to thermal expansion coefficient mismatches, using techniques such as chemical vapor deposition and electroless plating.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If organic and inorganic materials with different thermal expansion coefficients are used in stacked components, then device functionality is achieved, but warpage deformation occurs

Engineering Contradiction:
Improvedevice functionalityVSAvoidwarpage deformation
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent applies parameter changes by carefully selecting and controlling the thermal expansion coefficients of different materials in the stacked structure. By adjusting material composition and thickness parameters, the patent achieves compatibility between organic and inorganic materials while minimizing warpage deformation during thermal cycling.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent utilizes composite materials by combining organic and inorganic materials with complementary properties in a stacked configuration. This composite approach enables the device to achieve desired functionality while managing thermal expansion differences through material selection and layer design.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If multiple processing steps are performed to form electronic packages, then device functionality is achieved, but warpage deformation occurs due to thermal expansion mismatches

Engineering Contradiction:
Improvedevice functionalityVSAvoidwarpage deformation
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing encapsulation processes at strategically selected stages during manufacturing. By encapsulating certain components before others, the patent prevents warpage deformation from occurring during subsequent processing steps, thereby maintaining manufacturing precision while enabling device functionality.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively suppresses warpage deformation by managing thermal expansion differences between semiconductor components, ensuring stable and reliable electronic package formation.

Implementation Method 1

using techniques such as chemical vapor deposition and electroless plating

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 2

using techniques such as chemical vapor deposition and electroless plating

Methodology Applied
Scientific EffectElectroless plating: Electroplating

Data Source

PatentUS11901332B2Semiconductor device and manufacturing method thereof
Publication Date: 2024.02.13 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US11901332B2 patent drawing
  • US11901332B2 patent drawing
  • US11901332B2 patent drawing

AI summary

A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a method for manufacturing a semiconductor device that comprises ordering and performing processing steps in a manner that prevents warpage deformation from occurring to a wafer and/or die due to mismatching thermal coefficients.