Semiconductor Package Assembly for Thermal Warpage Resistance
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Solution Overview
Problem
Flip-chip semiconductor packages face material warpage due to thermal stress caused by differing coefficients of thermal expansion between semiconductor chips and package substrates, which existing technologies fail to adequately address.
Innovation Solution
The implementation of a semiconductor package design featuring a molding member with a protruding sidewall and a method of manufacture that includes using a carrier substrate and blades to form cutting grooves, which supports the chips and interposer during bonding to the package substrate, thereby reducing warpage risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor package structure is used, then manufacturing process is simple, but thermal stress causes material warpage
Solution Approach 1:
The molding member incorporates a protruding sidewall that extends horizontally outward from the vertical sidewall, creating a stepped configuration. This dimensional change adds a horizontal extension component that provides additional structural support against thermal stress-induced warpage without significantly complicating the manufacturing process.
Solution Approach 2:
The protruding sidewall creates an asymmetric structure where the molding member has different geometries at different heights. The upper portion extends horizontally outward more than the lower portion, providing targeted support at critical areas where warpage resistance is most needed while maintaining simplicity elsewhere.
2Stability of the object's composition
If molding member with protruding sidewall is used, then warpage resistance is improved, but manufacturing complexity increases
Solution Approach 1:
The protruding sidewall structure is pre-formed in the molding member before the chip and interposer assembly process. This preliminary structural preparation provides built-in support and alignment features that stabilize the assembly during subsequent bonding operations, preventing warpage before it occurs rather than correcting it later.
Solution Approach 2:
The horizontal protrusion is localized to specific regions of the molding member where additional support is needed, rather than uniformly increasing the entire molding member structure. This targeted approach provides local stability enhancement at critical interfaces while minimizing overall manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the resistance of semiconductor packages to thermal stress-induced warpage, ensuring stable chip and interposer alignment and performance.
Implementation Method 1
thermal stress applied to the semiconductor chip, an interposer and/or the package substrate may cause material(s) warpage
Data Source
AI summary
A method of manufacture for a semiconductor package includes; forming a molding member on side surfaces of the semiconductor chips, using an adhesive to attach a carrier substrate to upper surfaces of the molding member and the semiconductor chips, using a first blade having a first blade-width to cut away selected portions of the carrier substrate and portions of the adhesive underlying the selected portions of the carrier substrate, and using the first blade to partially cut into an upper surface of the molding member to form a first cutting groove, wherein the selected portions of the carrier substrate are dispose above portions of the molding member between adjacent ones of semiconductor chips, using a second blade having a second blade-width narrower than the first blade-width to cut through a lower surface of the molding member to form a second cutting groove, wherein a combination of the first cutting groove and the second cutting groove separate a package structure including a semiconductor chip supported by a cut portion of the carrier substrate and bonding the package structure to an upper surface of a package substrate.


