Semiconductor Package Sub-Panel Sawing for Warpage Control

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Solution Overview

Problem

Existing semiconductor packages face challenges in structural stability and warpage control, particularly in wafer-level packaging processes like FOWLP and FOPLP, which require improved methods to reduce costs and enhance performance.

Innovation Solution

A method involving the use of a carrier with specific region configurations and dummy dies to enhance structural stability and warpage control, including sawing steps to separate dies into individual packages, with dummy dies surrounding active dies to improve rigidity and handling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a carrier is used to dispose multiple dies during wafer-level packaging, then manufacturing cost is reduced and productivity is improved, but structural stability deteriorates and warpage control becomes difficult

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidstructural stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The carrier is divided into multiple sub-panels through first sawing, with each sub-panel containing one or more dies. This segmentation allows the carrier to maintain structural integrity during processing while enabling individual die extraction and packaging, thus resolving the contradiction between maintaining structural stability and achieving high productivity through wafer-level processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a specific region configuration on the carrier with different horizontal distances from the side of the carrier to the first region containing dies. This local variation in geometry provides enhanced structural support in critical areas while maintaining the overall efficiency of the wafer-level packaging process, thereby improving structural stability without sacrificing productivity.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If dies are disposed closely on the carrier to increase density, then area utilization is improved, but warpage control capability deteriorates

Engineering Contradiction:
Improvecarrier area utilizationVSAvoidwarpage control
Core Design Contradiction:
Area of stationary objectVSStability of the object's composition

Solution Approach 1:

The patent employs asymmetric positioning of dies on the carrier, with different horizontal distances from the carrier side to the first region containing dies. This asymmetric arrangement optimizes area utilization while distributing thermal and mechanical stresses more evenly across the carrier, thereby maintaining warpage control capability despite high die density.

Inventive Principle:
Principle #4Asymmetry

3Ease of operation

If the carrier is separated into sub-panels by first sawing, then ease of operation is improved for individual die handling, but device complexity increases

Engineering Contradiction:
Improvehandling convenienceVSAvoidprocess complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The carrier is pre-divided into sub-panels through first sawing before individual die extraction and testing. This preliminary segmentation simplifies subsequent handling operations by creating self-contained units, each containing one or more dies with their associated support structures, thereby improving ease of operation while managing process complexity through systematic preprocessing.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260076127A1Semiconductor package and smiconductor package manufacturing method
Publication Date: 2026.03.12 NEPES CO LTD
  • US20260076127A1 patent drawing
  • US20260076127A1 patent drawing
  • US20260076127A1 patent drawing

AI summary

A technical idea of a present invention provides a method for manufacturing a semiconductor package, comprising: a step of disposing a plurality of dies on a carrier while being spaced apart from each other in a horizontal direction; a first sawing step of sawing the carrier to separate the carrier into a plurality of sub-panels on which the plurality of dies are disposed; a step of testing the dies; and a second sawing step of sawing between each of the dies of the sub-panels to separate the sub-panels into individual semiconductor packages; wherein the carrier includes a plurality of first regions in which the dies are disposed and a second region in which the dies are not disposed, and wherein a first horizontal distance from a side of the carrier to the first region is smaller than a second horizontal distance from the first region to the first region.