Semiconductor Package Insulating Layer for Stable Wet Removal

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Solution Overview

Problem

The semiconductor industry faces challenges in creating semiconductor packages with high integration density and efficient packaging techniques, particularly in forming integrated circuit dies with stable insulating layers that can be easily removed during subsequent processing steps without damaging the underlying components.

Innovation Solution

A method involving the formation of an insulating layer with a high glass transition temperature and tensile strength, such as a polyimide layer with an ester group, which is applied over an integrated circuit die and efficiently removed using a wet etching process, allowing for stable processing and packaging while maintaining adhesion to the substrate and passivation films.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If an insulating layer is formed over an integrated circuit die to provide stability and adhesion, then the structural integrity and adhesion are improved, but the difficulty of removing the insulating layer without damaging underlying components increases

Engineering Contradiction:
ImproveadhesionVSAvoidremoval difficulty
Core Design Contradiction:
StrengthVSEase of manufacture

Solution Approach 1:

The insulating layer is segmented into multiple layers with different material compositions and properties. The first insulating layer has strong adhesion to the substrate, while the second insulating layer has controlled removability. This segmentation allows each layer to perform its specific function - providing structural support and adhesion while enabling selective removal without damaging underlying components.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes parameter changes in material properties, specifically glass transition temperature, to control the removability of the insulating layer. The second insulating layer is formulated with a lower glass transition temperature, making it softer and more susceptible to removal at processing temperatures. By controlling this thermal parameter, the layer can be easily removed when needed while maintaining stability during processing.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the insulating layer has high stability during processing, then processing reliability is improved, but the ease of removal in subsequent steps deteriorates

Engineering Contradiction:
Improveprocessing stabilityVSAvoidremoval ease
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The insulating structure is divided into two distinct layers with different material characteristics. The first layer provides processing stability and reliability with high thermal and mechanical stability, while the second layer is specifically designed for easy removal. This functional segmentation resolves the contradiction by assigning different roles to different layers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies parameter changes by selecting materials with different glass transition temperatures for the two insulating layers. The first layer uses a material with high glass transition temperature for stability during processing, while the second layer uses a material with lower glass transition temperature that becomes removable at moderate temperatures, thus achieving both processing reliability and ease of removal.

Inventive Principle:
Principle #35Parameter changes

3Strength

If the insulating layer maintains strong adhesion to the substrate, then structural integrity is improved, but the selectivity of removal without damaging the substrate worsens

Engineering Contradiction:
Improveadhesion strengthVSAvoidremoval selectivity
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The insulating layer is segmented into two layers with different adhesion characteristics. The first insulating layer maintains strong adhesion to the substrate for structural integrity, while the second insulating layer is designed with controlled adhesion that allows selective removal. This segmentation enables the system to simultaneously achieve strong overall adhesion and selective removability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses parameter changes in material composition and thermal properties to achieve selective adhesion. The first layer is formulated for strong adhesion to the substrate, while the second layer is formulated with a lower glass transition temperature and different chemical composition that reduces its adhesion strength, allowing it to be selectively removed without damaging the substrate or the first insulating layer.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of semiconductor packages with improved stability and efficiency, allowing for high-yield processing and efficient removal of the insulating layer without damaging the integrated circuit dies, thereby enhancing manufacturing efficiency and reducing costs.

Implementation Method 1

efficiently removed using a wet etching process

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS11854927B2Semiconductor package and method of forming same
Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11854927B2 patent drawing
  • US11854927B2 patent drawing
  • US11854927B2 patent drawing

AI summary

A package and a method forming the same are provided. The package includes an integrated circuit die. A sidewall of the integrated circuit die has a first facet and a second facet. The first facet and the second facet have different slopes. The package includes an encapsulant surrounding the integrated circuit die and in physical contact with the first facet and the second facet and an insulating layer over the integrated circuit die and the encapsulant. An upper surface of the integrated circuit die is lower than an upper surface of the encapsulant. A sidewall of the insulating layer is substantially coplanar with the first facet.