Semiconductor Package Wire Layout for Stacked Chip Heat Dissipation
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Solution Overview
Problem
As semiconductor chips in electronic devices become more miniaturized and multifunctional, there is a need for effective heat dissipation methods in semiconductor packages to manage the increasing heat generated, especially in stacked package-on-package configurations.
Innovation Solution
The semiconductor package incorporates a first semiconductor chip, a lower redistribution structure, an upper redistribution structure, conductive posts, and wires with high thermal conductivity to efficiently dissipate heat, where the first wire connects the semiconductor chip to the lower redistribution structure and the second wire connects the upper and lower redistribution structures, allowing for effective heat transfer and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If semiconductor chips are miniaturized and stacked in POP configuration to increase integration, then device functionality and integration are improved, but heat dissipation becomes more difficult and thermal management deteriorates
Solution Approach 1:
The patent transitions from planar heat dissipation to three-dimensional heat dissipation by extending wire bonds from the lower surface of the semiconductor chip to the upper surface of the lower redistribution structure, creating vertical heat conduction paths that utilize the Z-dimension for thermal management in addition to the X-Y plane
Solution Approach 2:
The patent introduces wire bonds as intermediary thermal conduction elements between the semiconductor chip and the lower redistribution structure. These wire bonds serve as thermal mediators that conduct heat away from the chip, with the lower redistribution structure acting as a thermal sink to absorb and dissipate the heat
2Temperature
If wire bonds are added for heat dissipation, then thermal management is improved, but device complexity increases
Solution Approach 1:
The patent makes the lower redistribution structure multi-functional by enabling it to serve both its original electrical redistribution function and a new thermal management function. The same structure that redistributes electrical signals also acts as a thermal sink to absorb heat conducted through the wire bonds, eliminating the need for separate dedicated heat dissipation structures
Solution Approach 2:
The patent merges the electrical interconnection function and thermal management function into a unified system. The wire bonds that provide electrical connectivity between redistribution layers also serve as thermal conduction paths, while the lower redistribution structure simultaneously performs electrical signal redistribution and heat absorption, combining multiple functions into fewer components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables effective heat dissipation from the semiconductor chip to peripheral devices, maintaining efficient thermal management and electrical connectivity, even in compact and multifunctional device designs.
Implementation Method 1
at least one first wire connecting a lower surface of the first semiconductor chip to an upper surface of the lower redistribution structure such as to be configured to dissipate heat of the first semiconductor chip
Data Source
AI summary
A semiconductor package includes a first semiconductor chip, a lower redistribution structure electrically connected to the first semiconductor chip, an upper redistribution structure on the first semiconductor chip, a conductive post electrically connecting the upper redistribution structure to the lower redistribution structure, and a first wire connecting a lower surface of the first semiconductor chip with an upper surface of the lower redistribution structure to dissipate heat of the first semiconductor chip.