Semiconductor Package Wire Heat Dissipation Design

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Solution Overview

Problem

The heat dissipation in semiconductor packages is inadequate, particularly due to the logic chip generating more heat than memory chips, which can lead to performance deterioration and reduced lifespan.

Innovation Solution

A semiconductor package design featuring a zigzag-shaped outer wire and a molding layer surrounding the chip stack and wires, with inner wires dissipating heat upward and outer wires dissipating it laterally, enhancing heat dissipation efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If chips are stacked vertically to increase integration density, then space utilization is improved, but heat dissipation capability deteriorates

Engineering Contradiction:

Improvespace utilizationVSAvoidheat dissipation capability

Core Design Contradiction:

Volume of moving objectVSTemperature

Solution Approach 1:

The patent transitions from conventional planar heat dissipation to three-dimensional heat dissipation by forming heat dissipation fins that extend vertically from the chip surface. Multiple fins are arranged in a matrix pattern, creating a three-dimensional heat dissipation structure that efficiently dissipates heat from stacked chips while maintaining compact vertical spacing.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The heat dissipation structure is divided into multiple discrete fins rather than a single continuous structure. These fins are segmented and arranged in a matrix pattern, allowing heat to be dissipated through multiple separate pathways simultaneously, improving overall heat dissipation efficiency while maintaining structural integrity.

Inventive Principle:

Principle #1Segmentation

2Stability of the object's composition

If logic chip is disposed at the bottom to support stacked memory chips, then structural stability is improved, but heat dissipation performance deteriorates

Engineering Contradiction:

Improvestructural stabilityVSAvoidheat dissipation performance

Core Design Contradiction:

Stability of the object's compositionVSTemperature

Solution Approach 1:

The heat dissipation fins are selectively formed only on the logic chip at the bottom of the stack, concentrating heat dissipation resources where they are most needed. The logic chip, which generates the most heat, receives enhanced local heat dissipation capability through the fin structure, while memory chips above can rely on passive conduction and convection.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively improves heat dissipation in semiconductor packages, enhancing the performance and lifespan of the chips by efficiently dissipating heat generated by the logic chip.

Implementation Method 1

outer wires dissipating it laterally, enhancing heat dissipation efficiency

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

inner wires dissipating heat upward

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS11502028B2Semiconductor package including a wire and a method of fabricating the semiconductor package

Publication Date: 2022.11.15 MIMIRIP LLC

AI summary

A semiconductor package is described. The semiconductor packager includes a chip stack mounted over a package substrate, a first wire disposed over the package substrate, and a molding layer surrounding the chip stack and the first wire. The first wire has an acute angle.