Semiconductor Packaging with Low-k Dielectric Film for Parasitic Capacitance
Solution Overview
Problem
Existing semiconductor packaging methods using epoxy resin and fluorine-containing elastomer or polymer resin face issues with moisture resistance, parasitic capacitance, and high frequency characteristics due to dielectric constant issues and poor compatibility between materials, leading to voids and contact property deterioration.
Innovation Solution
A plate-like dielectric film with a low dielectric constant is placed between the semiconductor chip and the sealing resin, covering only the active region to minimize interface area and reduce parasitic capacitance, while maintaining high frequency characteristics and chemical resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a full-mold package using epoxy resin is employed for mass production at low cost, then manufacturing cost is reduced and productivity is improved, but moisture resistance deteriorates due to moisture absorption from inside the resin to the semiconductor chip
Solution Approach 1:
The patent divides the protective structure into two segments: a first protective film (low dielectric constant material) covering the active region and a second protective film (epoxy resin) for overall sealing. This segmentation allows each layer to perform its specific function optimally while maintaining mass production capability
Solution Approach 2:
The patent applies different material properties to different regions: the active region receives a low dielectric constant protective film for high frequency performance, while other regions use epoxy resin for cost-effective sealing. This local differentiation resolves the contradiction between cost and performance
2Ease of manufacture
If epoxy resin is used for sealing the semiconductor chip, then manufacturing cost is reduced, but parasitic capacitance increases due to the high dielectric constant (3.9 to 4.5) of the resin entering the element portion
Solution Approach 1:
The patent applies a low dielectric constant protective film specifically to the active region where element portions are located, while using epoxy resin for other areas. This local application ensures high frequency performance is maintained in critical areas while keeping overall manufacturing costs low
Solution Approach 2:
The patent creates a composite protective structure combining two different resin materials with different dielectric constants. The first protective film (low dielectric constant) and second protective film (epoxy resin) work together to provide both high frequency performance and cost effectiveness
Data Source
AI summary
Provided is a semiconductor device including a semiconductor chip, a film (first film) which is provided so as to cover an active region with a peripheral portion of the semiconductor chip being uncovered, and is made of a dielectric material having a low dielectric constant, and a package molding resin (sealing resin) provided so as to cover the semiconductor chip and the film. As a result, deterioration in contact property with the sealing resin is suppressed and a high frequency characteristic can be enhanced.