Semiconductor Pad Layout for Higher Active Clamp Capacity

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Solution Overview

Problem

Semiconductor devices connected to inductive loads face energy absorption challenges, leading to potential failure due to excessive temperature rise when the energy stored in the inductive load exceeds a predetermined value, necessitating an increase in active clamp capacity to absorb this energy effectively.

Innovation Solution

The semiconductor device is designed with a semiconductor element and a first connection member where the connection region, including the center of gravity position of the transistor formation region, enhances the active clamp capacity by strategically positioning the connection member to optimize energy absorption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the first connection member is connected to the electrode pad at a position away from the center of gravity of the transistor formation region, then the manufacturing process is simpler, but the active clamp capacity is reduced

Engineering Contradiction:
Improveactive clamp capacityVSAvoidconnection structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by positioning the first connection member at the center of gravity position of the non-quadrangular transistor formation region, which is an asymmetric location. This asymmetric positioning optimizes the active clamp capacity by ensuring that the connection point aligns with the gravitational center of the transistor region, thereby improving energy absorption characteristics without requiring symmetric or conventional connection arrangements.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent applies local quality by concentrating the connection function at a specific critical location (the center of gravity position of the transistor formation region) rather than distributing it uniformly. This localized positioning at the center of gravity creates an optimal stress and energy distribution point, enhancing the active clamp capacity at this specific location while maintaining overall device simplicity.

Inventive Principle:
Principle #3Local quality

2Reliability

If the transistor formation region is divided into multiple divided regions with multiple connection members, then the active clamp capacity increases, but the manufacturing precision requirements increase

Engineering Contradiction:
Improveactive clamp capacityVSAvoidconnection position precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies segmentation by dividing the transistor formation region into multiple divided regions, each with its own center of gravity position. When multiple first connection members are used, each connection member is positioned at the center of gravity of its corresponding divided region. This segmentation approach increases the active clamp capacity by distributing connection points strategically while maintaining manufacturing feasibility through clear positional guidelines for each connection member.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12183663B2Semiconductor device
Publication Date: 2024.12.31 ROHM CO LTD
  • US12183663B2 patent drawing
  • US12183663B2 patent drawing
  • US12183663B2 patent drawing

AI summary

A semiconductor device includes a semiconductor element and a first connection member. The semiconductor element includes a substrate and an electrode pad. The substrate includes a transistor formation region, in which a transistor is formed and which is shaped to be non-quadrangular. The electrode pad is located on the transistor formation region. The first connection member is connected to the electrode pad at one location. The electrode pad is arranged to cover a center of gravity of the transistor formation region in a plan view of the electrode pad. In the plan view, a connection region in which the first connection member is connected to the electrode pad includes a center of gravity position of the transistor formation region.