Semiconductor Pad Array Segmentation for Stress and Reliability

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Solution Overview

Problem

Conventional semiconductor device pads formed using different methods exhibit varying reliability issues, such as reduced adhesion, poor mechanical performance, stress concentration, and poor reliability in temperature cycling, leading to overall low reliability and functional performance.

Innovation Solution

The semiconductor device incorporates a combination of via-in-pad (VIP) and non-via-in-pad (NVIP) pads, where VIP pads directly contact conductive vias and NVIP pads are isolated from vias, arranged in fine pitch regions and high-stress areas respectively, to enhance package density and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If pads are formed using conventional methods, then manufacturing is simpler, but reliability under stress and temperature cycling is poor

Engineering Contradiction:
Improvepad reliabilityVSAvoidpad configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The pad array is segmented into two distinct types: VIP pads with underlying conductors and NVIP pads without underlying conductors. This segmentation allows each pad type to be optimized for specific functions - VIP pads for electrical connectivity and NVIP pads for stress distribution - thereby improving overall reliability while managing complexity through functional differentiation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different pad configurations are applied to different locations within the pad array. VIP pads are strategically placed where electrical connectivity is required, while NVIP pads are positioned in areas benefiting from stress distribution. This local quality approach ensures that each region of the substrate receives the appropriate pad type for its specific functional requirements, optimizing both reliability and performance.

Inventive Principle:
Principle #3Local quality

2Reliability

If VIP pads are used to improve electrical connectivity, then conductivity is enhanced, but stress concentration increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidstress concentration
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The pad array is segmented into two distinct types: VIP pads with underlying conductors and NVIP pads without underlying conductors. This segmentation allows each pad type to be optimized for specific functions - VIP pads for electrical connectivity and NVIP pads for stress distribution - thereby improving overall reliability while managing complexity through functional differentiation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different pad configurations are applied to different locations within the pad array. VIP pads are strategically placed where electrical connectivity is required, while NVIP pads are positioned in areas benefiting from stress distribution. This local quality approach ensures that each region of the substrate receives the appropriate pad type for its specific functional requirements, optimizing both reliability and performance.

Inventive Principle:
Principle #3Local quality

3Strength

If NVIP pads are used to reduce stress concentration, then mechanical performance improves, but electrical connectivity is reduced

Engineering Contradiction:
Improvemechanical performanceVSAvoidelectrical connectivity
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The pad array is segmented into two distinct types: VIP pads with underlying conductors and NVIP pads without underlying conductors. This segmentation allows each pad type to be optimized for specific functions - VIP pads for electrical connectivity and NVIP pads for stress distribution - thereby improving overall reliability while managing complexity through functional differentiation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different pad configurations are applied to different locations within the pad array. VIP pads are strategically placed where electrical connectivity is required, while NVIP pads are positioned in areas benefiting from stress distribution. This local quality approach ensures that each region of the substrate receives the appropriate pad type for its specific functional requirements, optimizing both reliability and performance.

Inventive Principle:
Principle #3Local quality

4Quantity of substance

If pad density is increased to improve package density, then package size is reduced, but reliability under drop test decreases

Engineering Contradiction:
Improvepackage densityVSAvoiddrop test performance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The pad array is segmented into two distinct types: VIP pads with underlying conductors and NVIP pads without underlying conductors. This segmentation allows each pad type to be optimized for specific functions - VIP pads for electrical connectivity and NVIP pads for stress distribution - thereby improving overall reliability while managing complexity through functional differentiation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different pad configurations are applied to different locations within the pad array. VIP pads are strategically placed where electrical connectivity is required, while NVIP pads are positioned in areas benefiting from stress distribution. This local quality approach ensures that each region of the substrate receives the appropriate pad type for its specific functional requirements, optimizing both reliability and performance.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10991649B2Semiconductor device and method of manufacturing semiconductor device
Publication Date: 2021.04.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10991649B2 patent drawing
  • US10991649B2 patent drawing
  • US10991649B2 patent drawing

AI summary

A semiconductor device includes a first substrate, a pad array, a conductive bump, a first via and a dielectric. The pad array, formed on a surface of the first substrate, includes a first type pad and a second type pad at a same level. The conductive bump connects one of the first type pad of the second type pad to a second substrate. The first via, connected to a conductive feature at a different level to the first type pad, is located within a projection area of the first type pad and directly contacts the first type pad. The second type pad is laterally connected with a conductive trace on the same level. The conductive trace is connected to a second via at a same level with the first via. The dielectric in the first substrate contacts the second type pad. The second type pad is floated on the dielectric.