Semiconductor Pad Bonding Using Shrinkable Insulator Films

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Solution Overview

Problem

Joining defects between metal pads of substrates in semiconductor devices pose a challenge during the bonding process, leading to inefficiencies in the manufacturing of semiconductor devices.

Innovation Solution

The use of specific insulator films, such as polysilazane (PSZ) and densified tetraethyl orthosilicate (dTEOS) films, which are shrunk during thermal processing to apply compressive stress and facilitate the joining of metal pads by thermal expansion, and the incorporation of metal layers with higher linear expansion coefficients to enhance the bonding process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metal pads are bonded together during substrate joining, then electrical connection is achieved, but joining defects occur reducing reliability

Engineering Contradiction:
Improvejoining reliabilityVSAvoidjoining defects
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the physical state and dimensions of metal pads through thermal processing. Specifically, metal pads are heated to undergo thermal expansion, increasing their size to fill gaps and improve contact area with bonding partners, thereby reducing joining defects and enhancing reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent directly applies thermal expansion by heating metal pads to elevated temperatures during the bonding process. This thermal expansion causes the metal pads to increase in size, ensuring better mechanical and electrical contact while minimizing voids and defects at the bonding interface

Inventive Principle:
Principle #37Thermal expansion

2Reliability

If thermal processing is applied to shrink insulator films, then compressive stress is generated to facilitate pad joining, but process complexity increases

Engineering Contradiction:
Improvebonding qualityVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent utilizes phase transitions of insulator films during thermal processing. The insulator films undergo structural changes at elevated temperatures, shrinking in volume and generating compressive stress that facilitates metal pad joining and improves bonding quality

Inventive Principle:
Principle #36Phase transitions

Solution Approach 2:

The insulator films act as intermediary elements that mediate the bonding process. By shrinking during thermal processing, they generate compressive stress that indirectly facilitates metal pad joining, serving as a mechanical mediator between the heating process and the bonding outcome

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces joining defects between metal pads, ensuring a reliable and efficient bonding process, even after annealing, thereby improving the overall quality of semiconductor devices.

Implementation Method 1

specific insulator films, such as polysilazane (PSZ) and densified tetraethyl orthosilicate (dTEOS) films, which are shrunk during thermal processing to apply compressive stress

Methodology Applied
Scientific EffectThermal contraction: Thermal Contraction

Implementation Method 2

facilitate the joining of metal pads by thermal expansion

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 3

incorporation of metal layers with higher linear expansion coefficients to enhance the bonding process

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11862586B2Semiconductor device and method of manufacturing the same
Publication Date: 2024.01.02 KIOXIA CORP
  • US11862586B2 patent drawing
  • US11862586B2 patent drawing
  • US11862586B2 patent drawing

AI summary

In one embodiment, a semiconductor device includes a first insulator, a first pad provided in the first insulator, a second insulator provided on the first insulator, and a second pad provided on the first pad in the second insulator. Furthermore, the first insulator includes a first film that is in contact with the first pad and the second insulator, and a second film provided at an interval from the first pad and the second insulator, and including a portion provided at a same height as at least a portion of the first pad.