Parallel Semiconductor Pad Layout for Uniform Current Distribution
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Solution Overview
Problem
The semiconductor device in Patent document 1 experiences a difference in current paths between semiconductor elements due to varying distances, leading to uneven current distribution and potential premature failure of one element.
Innovation Solution
The semiconductor device aligns semiconductor elements along a specific direction, using a pad portion with a closed region defined by vertices to evenly distribute current among elements, ensuring balanced current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If semiconductor elements are connected in parallel to achieve larger capacity and higher output, then the device capacity and output are improved, but the current distribution becomes uneven due to differences in current path distances
Solution Approach 1:
The pad portion is designed with an asymmetric triangular shape where the three vertices are positioned at specific distances from the semiconductor elements. The first vertex is at a first distance from a first semiconductor element, the second vertex is at a second distance from a second semiconductor element, and the third vertex is at a third distance from a third semiconductor element. This asymmetric configuration allows for optimized current path lengths to each semiconductor element, ensuring uniform current distribution while maintaining high device output capacity.
2Productivity
If semiconductor elements are arranged with different distances from terminals, then device capacity can be increased, but the lifespan of semiconductor elements is reduced due to increased load on certain elements
Solution Approach 1:
The pad portion is designed with locally optimized vertex positions that create specific current path characteristics for each semiconductor element. The first vertex is positioned at a first distance from the first semiconductor element, the second vertex at a second distance from the second semiconductor element, and the third vertex at a third distance from the third semiconductor element. This local optimization of the pad geometry ensures that each semiconductor element receives appropriate current distribution, preventing any single element from being overloaded and thereby extending the overall device lifespan while maintaining high capacity.
Data Source
AI summary
Semiconductor device includes: semiconductor elements electrically connected in parallel; pad portion electrically connected to the semiconductor elements; and terminal portion electrically connected to the pad portion. As viewed in thickness direction, the semiconductor elements are aligned along first direction perpendicular to the thickness direction. The pad portion includes closed region surrounded by three line segments each formed by connecting two of first, second and third vertex not disposed on the same straight line. As viewed in thickness direction, the first vertex overlaps with one semiconductor element located in outermost position in first sense of the first direction. As viewed in the thickness direction, the second vertex overlaps with one semiconductor element located in outermost position in second sense of the first direction. As viewed in the thickness direction, the third vertex is located on perpendicular bisector of the line segment connecting the first and second vertex.