Semiconductor Bonding Pad Structure to Prevent Dishing

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Solution Overview

Problem

Existing semiconductor package manufacturing methods face challenges in achieving improved electrical performance and reliability due to issues like the dishing phenomenon, which can degrade the performance and reliability of the semiconductor package.

Innovation Solution

The method involves preparing a semiconductor structure with a through-via, forming an insulating layer, and then creating a metallic material layer with a concave and non-concave portion. A blocking layer is applied, and through planarization processes and wet etching, the structure is refined to prevent dishing and enhance bonding reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional planarization processes are used to flatten the bonding pad surface, then surface flatness is improved, but the dishing phenomenon occurs which degrades electrical performance and reliability

Engineering Contradiction:
Improvesurface flatnessVSAvoidbonding reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies a blocking layer to the concave portion of the metallic material layer before planarization. This preliminary action protects the concave region during subsequent planarization processes, preventing the dishing phenomenon that would otherwise occur and degrade bonding reliability while still achieving the required surface flatness for bonding.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates different surface profiles in different regions of the bonding pad structure. The convex portion is planarized to a first flat surface while the concave portion is protected and forms a second flat surface at a different level. This local differentiation allows each region to be optimized for its specific function, preventing dishing while maintaining overall surface quality for reliable bonding.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If the metallic material layer is formed with uniform thickness, then manufacturing simplicity is maintained, but the bonding pad surface exhibits dishing which reduces electrical performance

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidelectrical performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent intentionally creates a non-uniform metallic material layer with distinct convex and concave portions, each serving different functions. The convex portion provides structural support and the concave portion accommodates the through-via, with the blocking layer applied selectively to the concave region. This local differentiation prevents dishing and maintains electrical performance while remaining manufacturable through standard deposition and planarization processes.

Inventive Principle:
Principle #3Local quality

3Device complexity

If the bonding pad structure is simplified without the blocking layer, then device complexity is reduced, but dishing occurs during planarization which degrades bonding quality

Engineering Contradiction:
Improvestructure complexityVSAvoidbonding surface quality
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The blocking layer is applied as a preliminary protective measure before planarization. This simple additional layer prevents the dishing phenomenon during the planarization process, ensuring high bonding surface quality without requiring complex multi-step planarization or alternative manufacturing approaches. The blocking layer is subsequently removed, leaving a clean bonding surface.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in semiconductor packages with enhanced electrical performance and reliability by preventing the dishing phenomenon and ensuring stable direct or hybrid bonding of the bonding pads and insulating layers.

Implementation Method 1

performing a wet etching process to remove the barrier layer on the insulating layer and the first portion of the blocking layer, wherein a recessed portion below an upper surface of the metallic material layer is formed in the barrier layer during the wet etching process

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS12218086B2Semiconductor package and method of manufacturing same
Publication Date: 2025.02.04 SAMSUNG ELECTRONICS CO LTD
  • US12218086B2 patent drawing
  • US12218086B2 patent drawing
  • US12218086B2 patent drawing

AI summary

A method of manufacturing a semiconductor package includes bonding first the and second structures, such that a first bonding structure is directly bonded to a second bonding structure. The forming of the first structure includes; forming a blocking layer on a metallic material layer including a first portion covering a concaved portion of the metallic material layer and a second portion covering a non-concaved portion of the metallic material layer, performing a first planarization process to remove the second portion of the blocking layer while the first portion of the blocking layer remains, performing a second planarization process to remove the non-concaved portion of the metallic material layer and expose the barrier layer on the insulating layer, performing a wet etching process to remove the barrier layer on the insulating layer and the blocking layer to form the first bonding pad including the barrier layer in the opening and the metallic material layer and forming a recessed portion below an upper surface of the metallic material layer on the barrier layer while removing the barrier layer on the insulating layer.