Semiconductor Package Pad Layout to Prevent Insulating Layer Erosion
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Solution Overview
Problem
The difficulty in forming a stack structure of semiconductor chips due to step or level differences in connection pads and local erosion of insulating layers, which complicates the bonding operation.
Innovation Solution
A semiconductor package design that incorporates main and dummy connection pad structures arranged with specific densities and pitches to prevent local erosion of insulating layers, using a metal-oxide hybrid bonding method to attach the chips, with dummy pad densities gradually decreasing from the center to the edge, following a dummy gradient rule.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If connection pads are arranged closely to improve bonding density, then bonding efficiency is improved, but local erosion of insulating layers occurs
Solution Approach 1:
The patent applies local quality by introducing dummy connection pads with different densities in different regions. The first dummy connection pads have a first density and the second dummy connection pads have a second density different from the first, allowing different areas to have optimized properties for their specific function - preventing erosion where needed while maintaining bonding efficiency where applicable
Solution Approach 2:
The patent segments the dummy connection pads into at least two types: first dummy connection pads and second dummy connection pads. These are arranged in different regions with different densities, dividing the uniform structure into functional zones that address different aspects of the bonding process separately
2Reliability
If dummy connection pads are added to prevent insulating layer erosion, then bonding reliability is improved, but device complexity increases
Solution Approach 1:
The dummy connection pads serve multiple functions: they prevent local erosion of insulating layers, control stress distribution during bonding, and maintain structural integrity. By making the dummy pads multi-functional, the patent reduces the need for separate components, thereby managing complexity while improving reliability
3Stability of the object's composition
If connection pads are made larger to improve bonding stability, then bonding stability is improved, but step differences between pads increase
Solution Approach 1:
The patent changes the density parameter of dummy connection pads in different regions rather than uniformly increasing pad size. By adjusting the density (number per unit area) rather than the size of individual pads, the patent maintains pad level uniformity while still achieving bonding stability through optimized distribution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design minimizes defects in the bonding operation by preventing local erosion of insulating layers and ensures a stable bonding process, enhancing the reliability of the semiconductor package.
Implementation Method 1
a method of forming a stack structure of a plurality of semiconductor chips by attaching and sawing wafers through a connection pad
Implementation Method 2
using a metal-oxide hybrid bonding method to attach the chips
Data Source
AI summary
A semiconductor package includes a first semiconductor chip, a second semiconductor chip, first main connection pad structures, and first dummy connection pad structures. The first main connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip and arranged to be apart from each other by a first main pitch in a first direction parallel to a top surface of the first semiconductor chip, wherein each of the first main connection pad structures includes a first connection pad electrically connected to the first semiconductor chip, and a second connection pad electrically connected to the second semiconductor chip and contacting the first connection pad. The first dummy connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip, are arranged to be apart from the first main connection pad structures, and are arranged to be apart from each other by a first dummy pitch in the first direction, the first dummy pitch being greater than the first main pitch.