Semiconductor Pad Layout for Narrow Scribe Lines and Test Access
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Solution Overview
Problem
The reduction of scribe line size in semiconductor devices is hindered by pad electrodes used for measuring test elements, which need to be placed inside the chips.
Innovation Solution
The semiconductor device design incorporates power supply wirings that extend between the scribe region and the ODP pad electrodes, allowing the pad electrodes to be placed without obstructing the reduction of scribe line size, and includes a fuse element that can be electrically blown to sever connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If pad electrodes are disposed inside the scribe lines for measuring test elements, then measurement functionality is maintained, but the scribe line size cannot be reduced
Solution Approach 1:
The pad electrodes are extracted from the scribe line region and relocated to the chip area. This extraction resolves the spatial conflict by removing the obstructing elements (pad electrodes) from the scribe line space, enabling scribe line reduction while preserving measurement functionality through the relocated electrodes on the chip.
Solution Approach 2:
The measurement functionality is transitioned from a two-dimensional layout on the scribe line to a three-dimensional arrangement where pad electrodes are positioned on the chip surface. This dimensional relocation allows the scribe line to be minimized while maintaining access to test elements through vertical or lateral connections on the chip.
2Area of stationary object
If pad electrodes are disposed inside the chips for measurement, then scribe line size can be reduced, but the pad electrodes may obstruct other circuit layouts
Solution Approach 1:
The chip area is segmented into distinct functional regions: test element regions, pad electrode regions, and circuit regions. This segmentation allows pad electrodes to be positioned in dedicated areas without interfering with circuit layout, enabling both scribe line reduction and maintaining circuit design flexibility.
Solution Approach 2:
Different regions of the chip are assigned different functional qualities. Pad electrodes are localized to specific areas with appropriate electrical and physical properties, while other regions maintain circuit-specific characteristics. This local differentiation enables pad electrodes to coexist with circuits without mutual obstruction.
3Reliability
If connections are maintained for test elements, then measurement functionality is preserved, but moisture or chemical intrusion pathways remain open
Solution Approach 1:
A fuse element is preliminarily positioned in the connection path between pad electrodes and test elements. This fuse acts as a pre-positioned protective mechanism that can be activated to sever connections and block harmful factors before they can cause damage, while maintaining measurement functionality when the fuse is intact.
Solution Approach 2:
The fuse element provides beforehand protection against moisture or chemical intrusion by creating a sealable connection point. When the fuse is blown, it creates a physical barrier that cushions the test elements from environmental harmful factors, while the measurement functionality is preserved through alternative protected pathways or sealed structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables the reduction of scribe line size while maintaining the functionality of test elements, and provides a failure-resistant semiconductor device by preventing moisture or chemical intrusion through the severed connections.
Implementation Method 1
a fuse element that is capable of being electrically blown so as to sever a connection between the wiring and the lower wiring
Data Source
AI summary
An apparatus includes an active region; a scribe region surrounding the active region; a test component in the scribe region; a pad electrode in the active region; and a power supply wiring of an upper wiring layer in the active region, the power supply wiring extending between the test component and the pad electrode; and an interconnection structure coupling the test component and the pad electrode across a border between the active region and the scribe region, the interconnection structure including a wiring portion of a lower wiring layer crossing the power supply wiring.