Semiconductor Package Pad Layout for Undercut and Crack Resistance
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Solution Overview
Problem
Existing semiconductor packages face reliability issues due to stress-induced undercuts and cracks in the vulnerable areas near the contact boundary between semiconductor chips and the package substrate, which are exacerbated by uneven distribution of connection pads and inadequate adhesive strength.
Innovation Solution
The semiconductor package design includes a first group of connection pads with a wider width than a second group, positioned in a vulnerable area to prevent undercut formation and enhance adhesive contact with a protective layer, while a second group of narrower connection pads are placed in less stressed regions, maintaining design flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If connection pads are uniformly distributed across the package substrate, then manufacturing simplicity is maintained, but stress concentration and undercut formation occur in vulnerable areas near the contact boundary
Solution Approach 1:
The patent applies local quality by differentiating connection pad widths based on their spatial location. Connection pads in the first region (near the contact boundary) have a first width, while connection pads in the second region (away from the contact boundary) have a second width. This localized differentiation addresses stress concentration in vulnerable areas without requiring complete redesign of the entire pad structure, thus improving reliability while maintaining reasonable manufacturing complexity.
2Reliability
If connection pads near the contact boundary are made wider to prevent undercuts, then adhesive strength is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the connection pad population into two distinct groups based on their functional requirements. The first group of connection pads near the contact boundary is made wider to enhance adhesive strength and prevent undercuts, while the second group in less vulnerable areas maintains a standard width. This segmentation allows targeted reinforcement where needed without uniformly increasing manufacturing precision requirements across all pads.
3Strength
If connection pads are increased in width to enhance adhesive strength, then resistance to stress-induced undercuts improves, but device area consumption increases
Solution Approach 1:
The patent implements local quality by applying increased pad width only to connection pads in the first region near the contact boundary where stress concentration and undercut formation are most likely. Connection pads in the second region maintain their original, smaller width. This localized approach enhances adhesive strength where it is most needed while minimizing the overall area consumption on the package substrate.
Data Source
AI summary
A semiconductor package includes: a semiconductor chip; a package substrate below the semiconductor chip in a vertical direction; and a plurality of connection pads on a lower surface of the package substrate, wherein the plurality of connection pads include: a first group of connection pads having a first width, and a second group of connection pads having a second width smaller than the first width, and wherein the first group of connection pads are provided closer to an edge boundary of a contact surface between the semiconductor chip and the package substrate than the second group of connection pads.


