Semiconductor Wire-Bond Pad Layout for Shorter Signal Wiring
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Solution Overview
Problem
In semiconductor devices, the long wiring length between signal pads of a control IC and semiconductor elements leads to wire contact issues during sealing, peeling, and reduced productivity due to the lack of consideration for wire length in existing configurations.
Innovation Solution
The semiconductor device incorporates a configuration where the control IC's signal pads are wire-bonding connected to the signal pad group closer to the control IC in the semiconductor element, reducing wire length and preventing adjacent wire contact during sealing, thereby enhancing productivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If signal pads are wire-bonding connected to signal pads located farther away in the semiconductor element, then connection coverage is improved, but wiring length increases causing wire contact and peeling issues
Solution Approach 1:
The patent applies local quality by making different parts of the semiconductor element have different signal pad group arrangements. Specifically, a first signal pad group is disposed closer to the control IC than a second signal pad group, allowing wires to connect to nearer pads first. This local differentiation in pad positioning reduces wire length for critical connections while maintaining comprehensive signal coverage across the device.
Solution Approach 2:
The patent utilizes spatial dimensionality by arranging signal pads in multiple groups at different positions and distances from the control IC. Instead of a single flat arrangement, the signal pads are distributed in three-dimensional space with varying distances, allowing optimization of wire routing paths and reducing overall wiring length while maintaining all necessary connections.
2Reliability
If longer wires are used to connect distant signal pads, then connection coverage is improved, but productivity deteriorates due to wire contact and peeling during sealing
Solution Approach 1:
By creating local quality variations in signal pad positioning, the patent enables shorter wire connections to sufficient signal pads. The first signal pad group positioned closer to the control IC provides adequate connection coverage for critical signals, eliminating the need for excessively long wires that would cause contact and peeling issues during the sealing process, thereby improving assembly efficiency.
3Adaptability or versatility
If signal pads are arranged to cover all necessary connections, then connection completeness is improved, but wire length increases leading to contact between adjacent wires
Solution Approach 1:
The patent resolves this contradiction by implementing local quality through differentiated signal pad group positioning. The first signal pad group is strategically placed closer to the control IC to handle critical connections with shorter wires, while the second signal pad group accommodates additional connections. This localized optimization ensures complete signal coverage without requiring all wires to span the maximum distance, preventing adjacent wire contact.
Data Source
AI summary
An object is to provide a technique capable of improving productivity of a semiconductor device by reducing a wiring length of a wire. A semiconductor device includes a semiconductor element and a control IC controlling the semiconductor element, wherein the semiconductor element includes a pair of signal pad groups made up of a plurality of signal pads, the control IC includes a plurality of signal pads, the plurality of signal pads in the control IC are wire-bonding connected to the signal pad group closer to the plurality of signal pads in the control IC in the pair of signal pad groups in the semiconductor element.