Semiconductor Chip Pad Arrangement for Flip Chip Pitch
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Solution Overview
Problem
In semiconductor chip packaging, peripheral pads are not utilized for bonding or connecting pads, leading to electrical shorts and larger package sizes due to fine pitch requirements between central pads and conductive bumps in flip chip packages, which complicates electrical connections with package substrates.
Innovation Solution
The semiconductor chip design includes peripheral and central pads arranged on the edge and central regions, respectively, with pad lines connecting them, allowing both types of pads to function as bonding or connecting pads, thereby widening the pitch between conductive bumps and preventing electrical shorts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If peripheral pads are not used for bonding pads or connecting pads, then the package size increases to prevent electrical shorts, but the pad arrangement complexity and manufacturing difficulty increase
Solution Approach 1:
The patent makes peripheral pads multi-functional by enabling them to serve as bonding pads or connecting pads in addition to their traditional test pad function. This allows the same pad structure to be used for multiple purposes: test pads for testing, and bonding/connecting pads for electrical connections in flip chip and wafer level packages, eliminating the need for separate dedicated bonding pads.
Solution Approach 2:
The patent merges the functionality of test pads and bonding pads into a single peripheral pad structure. By configuring peripheral pads with appropriate pitch and electrical connection structures, they can simultaneously serve as test access points and bonding/connecting interfaces, reducing the overall number of required pad types and simplifying the pad arrangement.
2Area of moving object
If the interval between central pads corresponds to fine pitch between conductive bumps, then the chip area is reduced, but electrical shorts occur among conductive bumps
Solution Approach 1:
The patent extends electrical connections from the central region to the peripheral region of the chip by using pad lines that traverse through the substrate. This dimensional extension allows bonding pads to be positioned at the periphery while maintaining electrical connection to central circuit elements, effectively increasing the usable bonding area without reducing the pitch between central pads.
Solution Approach 2:
The patent segments the electrical connection path into multiple components: central pads, pad lines extending through the substrate, and peripheral bonding pads. This segmentation allows the connection function to be distributed across different spatial locations, enabling fine pitch central pads while maintaining reliable electrical connections at the periphery where larger spacing is available.
3Length of stationary object
If peripheral pads are not utilized for bonding or connecting pads, then the package size increases, but the electrical connection efficiency decreases
Solution Approach 1:
The patent enables peripheral pads to serve dual purposes as both test access points and bonding/connecting pads for electrical connections. This multi-functionality increases electrical connection efficiency by utilizing the peripheral region of the chip for bonding connections, thereby reducing the required package size while maintaining efficient electrical pathways.
Data Source
AI summary
A semiconductor chip may include a semiconductor substrate, a first central pad, a second central pad, a first peripheral pad, a second peripheral pad, a first pad line and a second pad line. The semiconductor substrate may have an active face. The first central pad and the second central pad may be arranged on a central region of the active face. The first peripheral pad and the second peripheral pad may be arranged on an edge region of the active face. The first pad line may be connected between the first central pad and the first peripheral pad. The second pad line may be connected between the second central pad and the second peripheral pad.