Semiconductor Pad Patterns with Punch Prevention Structures

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Solution Overview

Problem

Three-dimensional semiconductor devices face structural defects and reliability issues due to seam generation in conductive patterns, leading to operational malfunctions.

Innovation Solution

The semiconductor device incorporates interlayer insulating films with stepped structures, slit divisions, line patterns, pad patterns, and punch prevention patterns to prevent punch-through phenomena during contact plug formation, ensuring electrical isolation and improved reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive patterns are formed in three-dimensional semiconductor devices, then electrical connectivity between stacked memory cells is achieved, but seams are generated causing structural defects and reliability degradation

Engineering Contradiction:
Improveoperational reliabilityVSAvoidseam generation in conductive patterns
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The conductive pattern formation process is segmented into multiple stages: forming conductive patterns in first interlayer insulating films, then forming additional conductive patterns in second interlayer insulating films. This segmentation prevents seam generation by avoiding continuous conductive pattern formation across all layers at once, thereby resolving the contradiction between achieving electrical connectivity and preventing manufacturing defects.

Inventive Principle:
Principle #1Segmentation

2Reliability

If contact plugs are formed to connect conductive patterns, then electrical connectivity is established, but punch-through phenomena occur compromising device stability

Engineering Contradiction:
Improveelectrical connectivityVSAvoidpunch-through phenomenon
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

Punch prevention patterns are formed in advance before contact plug formation. These pre-formed patterns serve as protective barriers that prevent punch-through phenomena during subsequent contact plug fabrication, ensuring both electrical connectivity and device stability without compromising either aspect.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Punch prevention patterns act as intermediary protective structures between the contact plugs and the underlying conductive patterns. These intermediaries prevent direct harmful interaction (punch-through) while allowing the desired electrical connectivity to be established, thus resolving the contradiction between connectivity and stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If interlayer insulating films are stacked to increase integration density, then three-dimensional structure is achieved, but seam generation in conductive patterns occurs

Engineering Contradiction:
Improveintegration densityVSAvoidseam generation
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The stacking of interlayer insulating films is combined with segmented conductive pattern formation. Instead of forming continuous conductive patterns across all stacked layers, the process divides pattern formation into stages corresponding to different film stacks. This segmentation maintains high integration density while preventing seam generation that would compromise manufacturing precision.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9543317B2Semiconductor device and method of manufacturing the same
Publication Date: 2017.01.10 SK HYNIX INC
  • US9543317B2 patent drawing
  • US9543317B2 patent drawing
  • US9543317B2 patent drawing

AI summary

A semiconductor device includes interlayer insulating films spaced apart from each other and stacked over each other, and wherein first ends of the interlayer insulating films form a stepped structure; a slit penetrating the interlayer insulating films and dividing the interlayer insulating films into a plurality of stack structures; line patterns arranged between adjacent interlayer insulating films and separated from each other by the slit; pad patterns connected to the line patterns, formed over the first ends of the interlayer insulating films, and separated from each other by the slit; and at least one punch prevention pattern formed over sidewalls of the pad patterns adjacent to the slit and formed over the first ends of the interlayer insulating films.