Semiconductor Pad Rows Bridge Section Lead Length
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Solution Overview
Problem
In large-scale integrated semiconductor devices, the arrangement of power supply pads in two rows leads to complex connections between chip pads and package ball lands, resulting in long lead lengths or incomplete connections due to restricted wiring areas and noise interference between different power supplies.
Innovation Solution
The semiconductor device features a center area with two rows of pads, where power supply and GND pads are strategically arranged and connected using bridge sections and double-bonding techniques to facilitate efficient power supply and minimize noise interference, allowing for shorter lead lengths and stable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If pads are arranged in two rows in the center area of the chip, then the area utilization is improved, but the lead length increases and connection reliability deteriorates
Solution Approach 1:
The patent utilizes the third dimension (vertical stacking) by placing ball lands on both the upper and lower surfaces of the package substrate. This allows pads in the two-row center arrangement to connect to ball lands on either side, dramatically reducing lead length from 15.8mm to 3.9mm while maintaining efficient electrical connection.
2Area of stationary object
If pads are arranged in two rows, then area utilization is improved, but wiring complexity increases due to restricted wiring areas
Solution Approach 1:
The patent segments the ball land connections by row: first pad row connects to ball lands on the upper side, second pad row connects to ball lands on the lower side. This segmentation simplifies the wiring arrangement and reduces cross-interference, making the complex two-row pad layout manageable and efficient.
3Object-affected harmful factors
If power supply pads are separated for different power sources, then noise interference is reduced, but the number of pad types increases
Solution Approach 1:
The patent merges multiple power supply types (VDD, VDDP, VDDSA, VDDI) and GND types into a unified two-row pad structure. By strategically arranging pad pairs across the two rows and connecting them to ball lands on both upper and lower sides, it achieves noise isolation while reducing the visual and structural complexity of having numerous separate pad types.
Data Source
AI summary
A semiconductor device includes a semiconductor chip having at a center area thereof first and second pad rows which include a plurality of first pads and a plurality of second pads, respectively. A package substrate is bonded to the semiconductor chip. The package substrate includes a substrate opening corresponding to a region including the first and second pad rows, first and second wiring positioned at opposite sides of the substrate opening, respectively, and a ball land disposed in the first wiring area. A bridge section is provided over the substrate opening to mutually connect the first and second wiring areas. The ball land is electrically connected to at least one of the second pads through the bridge section by a lead.