Semiconductor Pad Stack Layout With Vertical I/O Isolation
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Solution Overview
Problem
There is a demand for increasing the data storage capacity of semiconductor devices, particularly through three-dimensional arrangements of memory cells, while minimizing damage to internal structures during the connection process.
Innovation Solution
A semiconductor device design featuring a second stacked structure and through wiring structures vertically spaced from the input/output pad, utilizing these structures as capacitors, resistors, and/or wires, with the second stacked structure and through wiring structures functioning as capacitors, resistors, or connection wires, and being manufactured simultaneously with the first stacked structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the second stacked structure and through wiring structures are formed close to the input/output pad to improve space efficiency, then the space utilization is improved, but the risk of damage during connection process increases
Solution Approach 1:
A mold insulator is introduced as an intermediary component between the input/output pad and the second stacked structure. This mold insulator vertically spaces apart the input/output pad from the second stacked structure, preventing direct contact and potential damage during the connection process while still allowing the second stacked structure to be positioned in the space below the input/output pad for improved space efficiency.
2Area of stationary object
If the second stacked structure is formed with the same height as the first stacked structure to maximize space utilization, then the space efficiency is improved, but the complexity of manufacturing increases
Solution Approach 1:
The stacked structures are segmented into two distinct groups: the first stacked structure on the cell array area and extension area, and the second stacked structure on the pad area. This segmentation allows each stacked structure to be independently controlled in height and formation process, enabling the second stacked structure to be formed at a lower height than the first stacked structure, thereby simplifying manufacturing while still utilizing the space below the input/output pad.
Data Source
AI summary
A semiconductor device may include a semiconductor substrate including a cell array area, an extension area, and a pad area; a first stacked structure on the cell array area and the extension area, the first stacked structure including first conductive layers and first insulating layers alternately stacked; an input/output pad on an upper end portion of the pad area; a second stacked structure on a lower side of the input/output pad and including a plurality of second conductive layers and a plurality of second insulating layers alternately stacked on the pad area; a plurality of through wiring structures respectively connected to the plurality of second conductive layers on the pad area; and a mold insulator between the input/output pad and the second stacked structure such that the input/output pad and the second stacked structure may be vertically spaced apart from each other.