Semiconductor Package Pad Structure for TSV Electromigration Control

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Solution Overview

Problem

Current semiconductor packages face challenges in achieving high integration and high speed while maintaining electrical reliability and structural stability, particularly in stacked semiconductor chip configurations.

Innovation Solution

The semiconductor chip design includes a semiconductor substrate with a through electrode structure, an insulating liner, and a bonding pad structure, where the insulating sidewall penetrates the pad insulating layer and partially surrounds the through electrode structure, preventing electro-migration and enhancing electrical reliability. Additionally, a method of manufacturing involves forming a pad insulating layer and bonding pad structure to ensure proper contact and structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a through electrode structure penetrates the pad insulating layer to improve electrical connection, then electrical reliability is improved, but electro-migration occurs causing structural instability

Engineering Contradiction:
Improveelectrical reliabilityVSAvoidstructural stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

An insulating sidewall is introduced as an intermediary structure between the through electrode structure and the pad insulating layer. The insulating sidewall penetrates the pad insulating layer and partially surrounds the through electrode structure, preventing direct contact between the conductive through electrode and the insulating layer, thereby preventing electro-migration while maintaining electrical connection reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If semiconductor chips are stacked to achieve high integration, then device functionality is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvehigh integrationVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The insulating sidewall is formed in advance before the bonding pad structure is deposited. By pre-forming the insulating sidewall that penetrates the pad insulating layer and surrounds the through electrode structure, the subsequent bonding pad formation process is simplified, and the risk of electro-migration is prevented from the outset, facilitating stacked chip manufacturing.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the insulating sidewall penetrates the pad insulating layer to prevent electro-migration, then electrical reliability is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveelectrical reliabilityVSAvoidmanufacturing precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The insulating sidewall is positioned locally at critical interfaces where electro-migration occurs - specifically where the through electrode structure contacts the pad insulating layer. Rather than requiring uniform high precision throughout the entire structure, the insulating sidewall is strategically placed only where needed to prevent electro-migration, reducing overall manufacturing precision requirements.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20230420397A1Semiconductor chip and semiconductor package including the same
Publication Date: 2023.12.28 SAMSUNG ELECTRONICS CO LTD
  • US20230420397A1 patent drawing
  • US20230420397A1 patent drawing
  • US20230420397A1 patent drawing

AI summary

A includes a semiconductor substrate, a pad insulating layer disposed on the semiconductor substrate, a through electrode structure that partially penetrates the semiconductor substrate but does not penetrate the pad insulating layer, an insulating liner that at least partially surrounds the through electrode structure, an insulating sidewall that penetrates the pad insulating layer, a part of the semiconductor substrate and at least a part of the insulating liner, and includes a pad hole formed therein, and a bonding pad structure disposed on the pad insulating layer and that fills the pad hole, and contacts the through electrode structure