Semiconductor Pad Structure Correction for Warpage-Aware Bonding
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Solution Overview
Problem
Substrates in semiconductor devices often fail to bond properly due to warpage and magnification issues, leading to potential degradation in electric properties and increased resistance between bonding surfaces.
Innovation Solution
The solution involves correcting the structure of metal pads on one substrate based on measurements of warpage and magnification states of the other substrate, ensuring a larger joint area and improved alignment through feedforward corrections in the patterning process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If substrates are bonded to manufacture a semiconductor device, then the device can be assembled, but warpage or magnification of substrates causes improper bonding
Solution Approach 1:
The patent applies preliminary action by measuring the warpage and magnification states of substrates before bonding, and using these measurements to correct the metal pad structures in advance. This feedforward correction approach allows the bonding process to compensate for anticipated misalignment issues, ensuring proper substrate bonding despite warpage or magnification variations.
2Productivity
If substrates with warpage are bonded, then assembly can proceed, but positional misalignment between metal pads occurs
Solution Approach 1:
The patent implements feedback by measuring the actual warpage and magnification states of substrates, using these measurement results to correct metal pad structures, and then verifying the bonding outcome. This closed-loop feedforward feedback mechanism ensures that alignment precision is maintained even when assembling substrates with warpage, by continuously adjusting based on measured deviations.
3Ease of manufacture
If standard metal pad structures are used, then manufacturing is simplified, but joint area between pads is reduced due to misalignment
Solution Approach 1:
The patent applies local quality by selectively correcting metal pad structures based on their specific positions and the measured warpage/magnification patterns. Rather than uniformly modifying all pads, the correction is localized to areas where misalignment occurs, adjusting pad shapes, sizes, or positions only where needed to maximize joint area while minimizing unnecessary manufacturing complexity.
4Device complexity
If no correction for warpage is applied, then manufacturing process remains simple, but electrical resistance between bonded substrates increases
Solution Approach 1:
The patent applies preliminary action by measuring warpage and magnification before bonding and using these measurements to pre-correct metal pad structures. This feedforward correction ensures that pads are properly aligned before bonding occurs, maintaining low electrical resistance and reliable connectivity without requiring complex real-time adjustments during the bonding process itself.
Data Source
AI summary
In one embodiment, a semiconductor device includes a lower insulator, and a plurality of lower pads provided in the lower insulator. The device further includes an upper insulator provided on the lower insulator, and a plurality of upper pads provided on the plurality of lower pads in the upper insulator. Furthermore, a second pad that is included in the plurality of upper pads is disposed on a first pad that is included in the plurality of lower pads, and a structure of the second pad is different from a structure of the first pad.