Semiconductor Package Pad Layout for Wire Sweep Compensation

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Solution Overview

Problem

The challenge in semiconductor packaging is the occurrence of poor connections due to the sweeping of conductive wires during the bonding process, particularly in high-density and high-performance applications, which can lead to defective electrical connections.

Innovation Solution

A semiconductor package design that includes a conductive pad with a diameter larger than the conductive wire and via, along with a redistribution structure, to compensate for wire sweeping, ensuring stable connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If vertical wire bonding is applied to connect semiconductor chips, then electrical connectivity is achieved, but wire sweeping occurs causing poor connections

Engineering Contradiction:
Improveconnection reliabilityVSAvoidwire positioning precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The conductive pad is formed in advance at a position that anticipates and compensates for the expected wire sweeping direction and magnitude. This preliminary positioning ensures that even when the wire sweeps during bonding, it will still make reliable contact with the pad rather than missing the connection point

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The conductive pad acts as an intermediary element between the conductive wire and the connection pad on the semiconductor chip. By introducing this intermediate structure with a larger diameter, it provides a tolerance zone that absorbs the wire sweeping effect while maintaining electrical connectivity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If conductive wire diameter is reduced for high-density packaging, then packaging density increases, but connection stability decreases due to wire sweeping

Engineering Contradiction:
Improvewire densityVSAvoidconnection stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

Instead of increasing the wire diameter throughout, the patent applies local quality enhancement by creating a conductive pad with a larger diameter at the critical connection point. This localized enlargement provides stability where needed while maintaining fine wire diameter for high-density packaging elsewhere

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The conductive pad is prepared in advance with a diameter larger than the wire, creating a pre-positioned target area that compensates for wire sweeping. This preliminary structure ensures that even thin wires can achieve stable connections despite positioning variations

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250391806A1Semiconductor package and manufacturing method for the same
Publication Date: 2025.12.25 SAMSUNG ELECTRONICS CO LTD
  • US20250391806A1 patent drawing
  • US20250391806A1 patent drawing
  • US20250391806A1 patent drawing

AI summary

The present disclosure as at least one embodiment provides a semiconductor package including a semiconductor chip including a connection pad; a conductive pad disposed on the semiconductor chip and spaced apart from the semiconductor chip; a conductive wire in contact with each of the connection pad of the semiconductor chip and the conductive pad, and connecting the connection pad and the conductive pad; an encapsulant that encapsulates at least a portion of each of the semiconductor chip, the conductive pad, and the conductive wire; and a redistribution structure disposed on the encapsulant and including a via in contact with the conductive pad and a wiring layer connected to the via, wherein the diameter of the conductive pad is larger than each diameter of the conductive wire and the via.