Semiconductor Panel Encapsulation via Preformed Polymer Forms
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Solution Overview
Problem
The semiconductor industry faces challenges in cost-efficient production of power semiconductor packages due to the need for effective handling of high currents, which existing manufacturing methods have not adequately addressed.
Innovation Solution
A method involving the use of preformed polymer forms to encapsulate semiconductor chips, where multiple chips are arranged between two polymer forms, and metallization material is deposited through-holes to provide electrical access, enabling efficient packaging and handling of high currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional packaging methods are used for power semiconductor packages, then manufacturing cost is reduced, but the ability to handle high currents is insufficient
Solution Approach 1:
The patent changes the material parameter from conventional organic packaging materials to metal packaging material, which fundamentally alters the electrical conductivity and current handling capability. This material parameter change enables the package to reliably handle high currents while maintaining cost-effectiveness through the manufacturing process described.
Solution Approach 2:
The invention creates a composite structure combining metal packaging material with semiconductor chips, where the metal provides both mechanical protection and electrical conductivity for high current handling. This composite approach resolves the contradiction by integrating multiple functions (structural support and electrical conduction) into a single packaging solution.
2Productivity
If larger panel sizes are used to increase chip processing capacity, then productivity is improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the manufacturing process into distinct stages: providing a metal packaging material, forming through-holes, depositing metallization, placing chips, and sealing. This segmentation allows large panels to be processed in manageable steps, maintaining productivity while controlling complexity through systematic process breakdown.
Solution Approach 2:
The method performs preliminary actions by pre-forming the metal packaging material and creating through-holes before chip placement. This preliminary preparation simplifies the overall manufacturing process for large panels, as the packaging structure and electrical pathways are established beforehand, reducing on-site complexity during assembly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved cost-efficiency and enhanced production capabilities for power semiconductor packages by allowing for larger panel sizes and increased chip processing, reducing production costs and improving electrical access to chip contacts.
Implementation Method 1
metallization material is deposited through-holes to provide electrical access
Data Source
AI summary
A method for manufacturing a semiconductor panel is disclosed. In one example, the method includes providing a first preformed polymer form. The method further includes arranging multiple semiconductor chips over the first preformed polymer form. The method further includes attaching a second preformed polymer form to the first preformed polymer form, wherein the semiconductor chips are arranged between the attached preformed polymer forms, and wherein the attached preformed polymer forms form the semiconductor panel encapsulating the semiconductor chips.