Semiconductor Device Parallel PN Layer Charge Balance
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Solution Overview
Problem
Conventional superjunction semiconductor devices face issues with breakdown voltage distribution and electric field concentration due to mismatched impurity concentrations in the boundary region between the element active portion and the high voltage structure, leading to decreased breakdown voltage and reliability.
Innovation Solution
A semiconductor device design featuring a first parallel pn layer with alternating n-type and p-type regions, surrounded by a second parallel pn layer with a narrower repetitive pitch, and an intermediate region with specific impurity concentrations to ensure charge balance and enhanced breakdown voltage, along with a manufacturing method involving ion implantation and heat treatment to form these layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the impurity concentration of the parallel pn layer is increased to decrease on-state resistance, then the breakdown voltage decreases
Solution Approach 1:
The patent applies local quality by creating different impurity concentration zones within the drift layer. The element active portion has a first impurity concentration optimized for low on-state resistance, while the high voltage structure has a second impurity concentration (lower than the first) to maintain high breakdown voltage. This spatial differentiation of impurity concentrations allows each region to be optimized for its specific function without compromising the other.
2Reliability
If the repetitive pitch of the parallel pn layer is narrowed in the high voltage structure, then the breakdown voltage increases, but the manufacturing complexity increases
Solution Approach 1:
The patent segments the drift layer into distinct regions with different parallel pn layer configurations. The element active portion uses a first repetitive pitch while the high voltage structure uses a second, narrower repetitive pitch. This segmentation allows independent optimization of each region's electrical characteristics while maintaining manufacturability through region-specific processing parameters.
3Reliability
If the impurity concentration is not balanced between n-type and p-type regions, then the breakdown voltage decreases due to electric field concentration
Solution Approach 1:
The patent employs parameter changes by systematically adjusting impurity concentration parameters across different regions and depths. The ion implantation process uses varied doses, energies, and patterns to create the desired concentration profiles. By changing these parameters during manufacturing, the patent achieves charge balance between n-type and p-type regions, preventing electric field concentration and maintaining high breakdown voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a higher breakdown voltage and reduced on-state resistance by maintaining charge balance and preventing electric field concentration, while allowing for independent adjustment of breakdown voltages between the element active portion and the high voltage structure, thereby enhancing the semiconductor device's reliability and performance.
Implementation Method 1
a manufacturing method involving ion implantation and heat treatment to form these layers
Implementation Method 2
a manufacturing method involving ion implantation and heat treatment to form these layers
Data Source
AI summary
A first parallel pn layer having a first n-type region and a first p-type region junctioned alternately and repeatedly is disposed in an element active portion. The first parallel pn layer has a striped planar layout. A second parallel pn layer having a second n-type region and a second p-type region junctioned alternately and repeatedly is disposed in a high voltage structure. The second parallel pn layer has a striped planar layout in a direction identical to that of the first parallel pn layer. An intermediate region having a third parallel pn layer and a fourth parallel pn layer of a lower impurity quantity than the first parallel pn layer is disposed between the first and second parallel pn layers, and formed by diffusing impurity implanting regions becoming the first and the second parallel pn layers formed separated from each other to a region in which no impurity is ion-implanted.