Semiconductor Package Partial Plating Contact Sidewalls

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Solution Overview

Problem

Semiconductor packages face issues with corrosion and reduced solderability due to exposed copper surfaces after singulation, leading to potential device failures, as the side surfaces of contacts are not plated and are susceptible to oxidation, which interferes with solder wettability.

Innovation Solution

A semiconductor package design with partial plating on contact side surfaces, where the first surface is plated, the second surface is exposed, and at least a portion of the third surface is plated, ensuring quality soldering even if unplated areas are contaminated, without requiring additional processing steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the semiconductor array is electroplated with lead finished material before singulation, then the bottom surfaces of contacts are tin plated and protected from oxidation, but the sidewalls of contacts remain exposed and susceptible to corrosion after singulation

Engineering Contradiction:
Improvecorrosion resistanceVSAvoidoxidation on exposed surfaces
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies plating to the sidewalls of contacts before the singulation process. By performing the plating action preliminarily on the array form, the exposed sidewall surfaces are protected before they can be contaminated during subsequent handling and storage after singulation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent selectively plates only the sidewall surfaces of the contacts that require corrosion protection, while leaving other surfaces with their original plating or finish. This localized application of plating ensures protection where needed without unnecessarily altering other surfaces.

Inventive Principle:
Principle #3Local quality

2Reliability

If additional plating is applied to sidewalls after singulation, then corrosion protection is improved, but manufacturing complexity and processing steps increase

Engineering Contradiction:
ImprovesolderabilityVSAvoidnumber of processing steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the sidewall plating operation with the existing plating process used for bottom surfaces. By merging these plating operations into a single process step applied to the array before singulation, the patent achieves comprehensive protection without adding separate post-singulation plating steps.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs the sidewall plating preliminarily before singulation, when the contacts are still in array form and accessible to the plating solution. This preliminary action eliminates the need for additional post-singulation processing steps.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Ensures reliable soldering to a substrate by preventing oxidation and maintaining solderability, even in contaminated conditions, by applying a single plating layer to the semiconductor package, which covers the necessary surfaces while leaving others exposed.

Implementation Method 1

the contacts are plated with a lead finished material, such as matte tin (Sn), using electroplating

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS10515878B1Semiconductor package with partial plating on contact side surfaces
Publication Date: 2019.12.24 UTAC HEADQUARTERS PTE LTD
  • US10515878B1 patent drawing
  • US10515878B1 patent drawing
  • US10515878B1 patent drawing

AI summary

Embodiments of the present invention are directed to a semiconductor package with partial plating on contact side surfaces. The semiconductor package includes a top surface, a bottom surface opposite the top surface, and side surfaces between the top and bottom surfaces. Contacts are located on peripheral edges of the bottom surface. Each of the contacts includes a first surface that is flush with the bottom surface, a second surface that is flush with one of the side surfaces, and a third surface between the first surface and the second surface. Each of the side surfaces can include a step such that the area of the bottom surface is differently sized from the area of the top surface and the third surface is located at the step. The first surface is plated, while the second surface is exposed (not plated). At least a portion of the third surface is plated.