Semiconductor Defect Analysis via Partial Reset of Functional Regions
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor defect analysis is time-consuming and inefficient, as physical defect analysis requires repeated diagnosis for similar defects, hindering yield improvement in semiconductor fabrication.
Innovation Solution
A semiconductor system that includes a controller to select and partially reset fail points based on defect analysis information, using a partial reset command to target specific functional regions within the semiconductor device, thereby reducing analysis time and enhancing defect detection accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If physical defect analysis is performed to detect and diagnose semiconductor defects, then measurement precision and reliability are improved, but loss of time increases due to repeated diagnosis and lengthy analysis processes
Solution Approach 1:
The semiconductor device is divided into multiple functional regions, each with its own sequential circuit that can be independently reset. This segmentation allows defect analysis to be performed on specific regions rather than the entire device, significantly reducing the time required for diagnosis while maintaining detection accuracy.
Solution Approach 2:
Instead of performing a complete reset or full-device analysis, the invention applies partial reset action to only the affected functional regions identified through defect analysis information. This partial action approach reduces unnecessary analysis time while focusing resources on the specific areas where defects are likely to occur.
2Reliability
If complete reset is performed on the semiconductor device to analyze defects, then reliability of defect detection is improved, but productivity decreases due to extended analysis time and repeated testing
Solution Approach 1:
The device is segmented into addressable functional regions that can be independently tested and reset. This allows reliable defect detection in specific regions without requiring complete device reset, thereby maintaining analysis reliability while improving overall productivity by reducing redundant testing of non-defective regions.
Solution Approach 2:
Defect analysis information is collected and processed in advance during the process stage to identify potential fail points before field operation. This preliminary action allows the system to pre-target specific functional regions for reset and testing, making the subsequent defect analysis more reliable and faster, thus improving productivity.
3Productivity
If statistical-based defect analysis information is used alone, then productivity is improved by reducing analysis time, but measurement precision decreases due to lack of actual field defect data
Solution Approach 1:
The invention merges statistical-based defect analysis information with actual field defect analysis results obtained from partial reset operations. This combination allows the system to use statistical data for quick preliminary assessment (maintaining productivity) while supplementing it with precise actual measurement data from targeted reset operations (improving measurement precision).
Solution Approach 2:
The system implements a feedback mechanism where actual field defect analysis results from partial reset operations are used to update and refine the statistical-based defect analysis information. This feedback loop continuously improves the accuracy of defect prediction while maintaining the efficiency benefits of statistical analysis, resolving the contradiction between productivity and measurement precision.
Data Source
AI summary
A semiconductor system includes a controller configured to: select a plurality of fail points based on defect analysis information collected in a process stage, and provide an address designating at least one of the fail points together with a partial reset command; and a semiconductor device including a plurality of functional regions each including one or more of the fail points, the semiconductor device configured to reset, in response to the partial reset command, a sequential circuit disposed in a target functional region corresponding to the address among the functional regions.