Semiconductor Passivation Structure for Leakage Reduction

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Solution Overview

Problem

Semiconductor devices face challenges in maintaining high voltage blocking capabilities due to sensitivity of semiconductor surfaces to charges in the passivation material at high electric field regions, leading to reduced voltage blocking and increased leakage currents.

Innovation Solution

A semiconductor device design that includes a passivation structure extending into the active device area and an encapsulation structure covering the edge of the passivation structure above the contact electrode, preventing moisture and ion entry and enhancing protection of the edge termination area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a passivation layer is applied to protect the semiconductor surface, then the surface is protected from environmental contaminants, but charges in the passivation material reduce voltage blocking capability and increase leakage currents

Engineering Contradiction:
Improvesurface protectionVSAvoidvoltage blocking capability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The passivation structure is divided into two distinct parts: a first passivation layer directly on the semiconductor surface, and a second encapsulation layer covering the first passivation layer. This segmentation allows the first layer to provide surface protection while the second layer isolates it from contaminants, preventing charge accumulation that would harm voltage blocking capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first passivation layer acts as an intermediary between the semiconductor surface and the second encapsulation layer. It provides the necessary surface protection and adhesion while being encapsulated by the second layer, which prevents environmental contaminants from reaching it and causing charge accumulation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the passivation layer extends laterally into the active device area, then edge termination area is better protected, but the contact electrode area becomes exposed to contaminants

Engineering Contradiction:
Improveedge termination protectionVSAvoidcontact electrode exposure
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The protection is extended to a third dimension by adding the second encapsulation layer that covers the lateral edges of the first passivation layer. This vertical encapsulation protects the contact electrode area and any laterally extending passivation structures from environmental contaminants without restricting the lateral coverage needed for edge termination protection.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If no encapsulation structure is used, then the device structure remains simple, but moisture and ions can enter and degrade performance

Engineering Contradiction:
Improvestructure simplicityVSAvoidperformance stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

A thin film encapsulation structure (second passivation layer) is applied over the first passivation layer to create a barrier against moisture and ions. This thin film approach provides effective protection while minimizing the increase in device complexity and maintaining structural compactness.

Inventive Principle:
Principle #30Flexible shells and thin films

Data Source

PatentUS11211303B2Semiconductor device including a passivation structure and manufacturing method
Publication Date: 2021.12.28 INFINEON TECHNOLOGIES AG
  • US11211303B2 patent drawing
  • US11211303B2 patent drawing
  • US11211303B2 patent drawing

AI summary

An embodiment of a semiconductor device includes a semiconductor body having a first main surface. The semiconductor body includes an active device area and an edge termination area at least partly surrounding the active device area. The semiconductor device further includes a contact electrode on the first main surface and electrically connected to the active device area. The semiconductor device further includes a passivation structure on the edge termination area and laterally extending into the active device area. The semiconductor device further includes an encapsulation structure on the passivation structure and covering a first edge of the passivation structure above the contact electrode.