Semiconductor Passive Device Fabrication via Process Merging

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Solution Overview

Problem

The existing semiconductor process is inefficient and costly due to the need for dedicated process steps for producing separate semiconductor devices, such as polysilicon resistors and capacitors, which increases cycle time and costs by up to 5%.

Innovation Solution

The method involves using overlapping process steps from other semiconductor devices to produce polysilicon resistors and capacitors, leveraging existing steps like RESURF oxide layers and implantation processes, reducing the need for dedicated photolithographic and ion implantation steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If dedicated photolithographic, masking, and ion implantation process steps are used to produce resistor structures, then manufacturing precision and device performance are improved, but production cost and cycle time increase by up to 5%

Engineering Contradiction:

Improveresistor structure precisionVSAvoidwafer production efficiency

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies universality by enabling existing process steps (photolithography, masking, ion implantation) to serve dual purposes: producing both active semiconductor devices and passive resistor/capacitor structures. The same process steps that create transistors are also used to form passive devices, eliminating the need for dedicated process lines and improving overall wafer utilization efficiency.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the production of active and passive devices into a unified process flow. By combining the fabrication of resistors and capacitors with the production of active devices on the same wafer using overlapping process steps, the patent reduces total process time and increases productivity while maintaining manufacturing precision through the use of existing high-precision process equipment.

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If dedicated process steps are used for capacitor structure production, then device performance and reliability are improved, but production cost and cycle time increase

Engineering Contradiction:

Improvecapacitor structure reliabilityVSAvoidwafer cycle time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by forming the capacitor structures using existing process steps that are already part of the active device fabrication sequence. The capacitor dielectric layers and electrode structures are created during the same process window as active device formation, rather than requiring subsequent dedicated processing, thereby reducing overall cycle time while maintaining reliability.

Inventive Principle:

Principle #10Preliminary action

3Manufacturing precision

If separate dedicated process lines are used for passive devices, then device performance is improved, but fabrication complexity and cost increase

Engineering Contradiction:

Improvepassive device performanceVSAvoidprocess fabrication complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent eliminates fabrication complexity by making the fabrication process universal. The same process steps, equipment, and process parameters used for active devices are also used for passive devices, simplifying the overall fabrication system. This approach reduces the number of dedicated process lines needed and decreases operational complexity while maintaining the precision required for passive device performance.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces parasitic capacitance in resistor structures and increases breakdown voltage in capacitor structures, while lowering production costs and cycle times by up to 5% by repurposing existing process steps.

Implementation Method 1

forming an N-type silicon region disposed within a P-type silicon substrate

Methodology Applied

Scientific EffectPN junction:

Implementation Method 2

forming a field oxide (FOX) layer in the P-type silicon substrate

Methodology Applied

Scientific EffectOxidation: Oxidation

Implementation Method 3

forming a reduced surface field (RESURF) oxide (ROX) layer having a first portion disposed on the exposed N-type silicon region

Methodology Applied

Scientific EffectDielectric insulation: Dielectric

Data Source

PatentUS8987107B2Production of high-performance passive devices using existing operations of a semiconductor process

Publication Date: 2015.03.24 SEMICON COMPONENTS IND LLC

AI summary

In one general aspect, a semiconductor processing method can include forming an N-type silicon region disposed within a P-type silicon substrate. The method can also include forming a field oxide (FOX) layer in the P-type silicon substrate where the FOX layer includes an opening exposing at least a portion of the N-type silicon region. The method can further include forming a reduced surface field (RESURF) oxide (ROX) layer having a first portion disposed on the exposed N-type silicon region and a second portion disposed on the FOX layer where the ROX layer includes a first dielectric layer in contact with the exposed N-type silicon region and a second dielectric layer disposed on the first dielectric layer. The method can further include forming a doped polysilicon layer having a first portion disposed on the first portion of the ROX layer and a second portion disposed on the second portion of the ROX layer.