Semiconductor Pattern Evaluation Using Contour Distribution Reference
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Solution Overview
Problem
Existing methods for evaluating circuit pattern shapes in semiconductor manufacturing face challenges due to limitations in forming ideal patterns, noise and luminance unevenness in SEM images, and difficulties in predicting and correcting pattern deformations, leading to incorrect shape evaluations.
Innovation Solution
A pattern generating apparatus and evaluating apparatus that use contour data sets to create a reference pattern by determining average or center positions between multiple contour data sets, performing contour filling and thinning processing, and generating contour distribution data to accurately evaluate shape deviations and determine pattern quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a reference pattern is created from design data, then the evaluation method is simple, but the shape evaluation is incorrect due to differences between ideal design patterns and actually formed patterns
Solution Approach 1:
The patent performs preliminary actions by capturing multiple actually-formed patterns before creating the reference pattern. This allows the reference pattern to reflect real manufacturing conditions and variations, ensuring that subsequent shape evaluations are based on realistic rather than ideal patterns.
Solution Approach 2:
Instead of using design data to create the reference pattern, the patent captures actual formed patterns using an SEM to create the reference pattern. This copying approach ensures the reference pattern accurately represents the true shape of manufactured patterns, resolving the discrepancy between design and actual patterns.
2Measurement precision
If multiple captured images are processed to generate reference pattern, then the reference pattern is more accurate, but the processing complexity increases
Solution Approach 1:
The patent segments the image processing into distinct steps: contour extraction from multiple captured images, superposition of extracted contours, and generation of the reference pattern from superimposed contours. This segmentation makes the complex processing more manageable and systematic.
Solution Approach 2:
The patent extracts only the essential contour information from captured images, separating the critical shape data from other image details like noise and luminance variations. This extraction approach simplifies subsequent processing while maintaining accuracy.
3Manufacturing precision
If conventional lithography is used for fine patterning, then the manufacturing process is established, but the process window is extremely reduced leading to sensitivity to variations
Solution Approach 1:
The patent implements feedback by capturing actual formed patterns and using them to generate a reference pattern that reflects real process variations. This feedback loop allows the evaluation system to adapt to actual manufacturing conditions, making the process more robust to variations by learning from real data rather than relying on ideal models.
Data Source
AI summary
Although there has been a method for evaluating pattern shapes of electronic devices by using, as a reference pattern, design data or a non-defective pattern, the conventional method has a problem that the pattern shape cannot be evaluated with high accuracy because of the difficulty in defining an exact shape suitable for the manufacturing conditions of the electronic devices. The present invention provides a shape evaluation method for circuit patterns of electronic devices, the method including a means for generating contour distribution data of at least two circuit patterns from contour data sets on the circuit patterns; a means for generating a reference pattern used for the pattern shape evaluation, from the contour distribution data; and a means for evaluating the pattern shape by comparing each evaluation target pattern with the reference pattern.