Semiconductor Pattern Matching via Feature Encoding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing pattern matching methods in semiconductor manufacturing, particularly in lithographic processes, face challenges in efficiently grouping patterns without vertices and handling inclined features, leading to computational inefficiencies and inability to compare patterns with shifted or fuzzy geometries effectively.
Innovation Solution
A method for pattern grouping that encodes non-intersected feature portions into computationally efficient representations, allowing for exact, shifted, fuzzy, and inclined pattern matching by comparing pattern representations, and selecting representative patterns for metrology or model training.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional pattern matching methods are used to group patterns in semiconductor manufacturing, then pattern comparison can be performed, but computational efficiency deteriorates and runtime increases when handling patterns without vertices and inclined features
Solution Approach 1:
The pattern matching process is segmented into distinct phases: encoding patterns into standardized representations, comparing encoded representations to identify matches, and grouping patterns based on match results. This segmentation allows each phase to be optimized independently, improving overall computational efficiency when handling patterns without vertices and inclined features
Solution Approach 2:
The patent replaces traditional geometric pattern comparison mechanisms with a data-based encoding and comparison system. Patterns are encoded into standardized representations that capture their essential features, and matching is performed through efficient data comparison algorithms rather than complex geometric computations, significantly reducing runtime
2Adaptability or versatility
If existing pattern matching approaches are applied to patterns with inclined features and no vertices, then pattern comparison becomes possible, but computational complexity increases
Solution Approach 1:
The patent changes the parameter representation of patterns by encoding them into standardized formats that are independent of their original geometric orientation. This parameter transformation allows inclined features and patterns without vertices to be handled using the same matching logic as traditional patterns, maintaining adaptability while reducing computational complexity
Data Source
AI summary
A method for grouping patterns associated with one or more design layouts of a semiconductor. The method involves obtaining a set of patterns (e.g., from one or more design layouts), where a pattern of the set of patterns includes a non-intersected feature portion (e.g., parallel bars) within a bounding box of the pattern. A non-intersected feature portion of a pattern is encoded to a pattern representation having elements, where each element has a first component indicating a type of an individual non-intersected feature portion, and a second component indicating a width of the individual non-intersected feature portion projected along a designated edge of an area enclosing the pattern. The set of patterns are grouped into one or more groups by comparing the pattern representations associated with the set of patterns.