Semiconductor Structure Patterned Features Multiple Patterning

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Solution Overview

Problem

Existing photolithography processes are unable to match the continuously reducing critical dimensions of semiconductor devices, limiting further development of semiconductor technology due to limitations in forming features with desired morphology and dimensions using double patterning processes like Self-Aligned Double Patterning (SADP).

Innovation Solution

A multiple patterning method involving a substrate with distinct regions, where sacrificial films and mask films are formed and etched to create sidewalls with varying dimensions, allowing for the formation of patterned features with different critical dimensions by using these sidewalls as etching masks, ensuring desired morphology and dimensionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If existing photolithography processes are used, then the manufacturing process is simple, but the critical dimension cannot be reduced further due to resolution limitations

Engineering Contradiction:
Improvecritical dimensionVSAvoidpatterning process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the patterning process into multiple stages: first forming sacrificial layers with initial patterns, then forming sidewalls on these sacrificial layers, and finally using the sidewalls as masks to create the final fine-pitch features. This multi-step segmentation enables achieving smaller critical dimensions that cannot be obtained through single-step photolithography.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs preliminary action by first forming sacrificial layers and sidewall structures before creating the final patterned features. These preliminary structures (sacrificial layers and sidewalls) serve as templates and masks that guide the formation of the ultimate fine-pitch features, enabling precise control over the final critical dimension.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If SADP process is used to reduce critical dimension, then the critical dimension can be reduced, but the sidewall morphology cannot match desired requirements

Engineering Contradiction:
Improvecritical dimensionVSAvoidsidewall morphology
Core Design Contradiction:
Manufacturing precisionVSShape

Solution Approach 1:

The patent applies local quality by forming different types of mask structures in different regions: first mask structures in a first region and second mask structures in a second region. Each region's mask structures are optimized for local requirements, allowing different critical dimensions and morphology characteristics to be achieved in different areas of the substrate.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs parameter changes by varying the dimensions and configurations of sacrificial layers and sidewalls across different regions. By adjusting parameters such as sacrificial layer thickness, sidewall height, and sidewall spacing, the patent achieves desired sidewall morphology and critical dimensions that match specific design requirements.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the formation of patterned features with precise critical dimensions, overcoming the limitations of existing photolithography processes and enhancing semiconductor device development by allowing for smaller and more complex feature sizes.

Implementation Method 1

forming a plurality of first mask structures in the first region; and a plurality of second mask structures protected by the certain mask layer in the second region by etching the second mask film, the first mask film, and the sacrificial film until the surface of the substrate is exposed

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS9716007B2Semiconductor structure including patterned feature
Publication Date: 2017.07.25 SEMICON MFG INT (SHANGHAI) CORP
  • US9716007B2 patent drawing
  • US9716007B2 patent drawing
  • US9716007B2 patent drawing

AI summary

A multiple patterning method is provided. The multiple patterning method includes providing a substrate; and forming a sacrificial film on the substrate. The multiple patterning method also includes forming a first mask film on the sacrificial film; and forming a second mask film for subsequently forming a certain structure to protect the subsequently formed mask structures on the first mask film. Further, the multiple patterning method includes forming first mask structures and second mask structures by etching the second mask film, the first mask film, and the sacrificial film.