Semiconductor Patterning via Conformal Mask Deposition
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Solution Overview
Problem
Current semiconductor patterning processes, such as SADP, SATP, and SAQP, lack design flexibility and require multiple photomasks, leading to increased production costs and reduced pattern accuracy due to limitations in feature size uniformity and complexity.
Innovation Solution
A semiconductor patterning process that involves forming initial mask patterns on a substrate with different feature sizes, using a series of mask material layers and anisotropic etching to create final mask patterns, allowing for greater design flexibility and simplification of process steps by enabling patterns with varying feature sizes without additional lithography processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If self-aligned double patterning (SADP), self-aligned triple patterning (SATP), or self-aligned quadruple patterning (SAQP) processes are used to increase circuit integration, then the degree of integration is improved, but the design flexibility is reduced and production costs increase due to the requirement of multiple photomasks
Solution Approach 1:
The patent employs self-aligned patterning where the mask patterns automatically align with each other through the conformal deposition of mask material layers on the substrate and initial mask patterns. This self-alignment mechanism eliminates the need for multiple photomasks while maintaining high circuit integration, thereby resolving the contradiction between productivity and design flexibility
Solution Approach 2:
The patterning process is divided into multiple stages: forming initial mask patterns, conformally depositing mask material layers, and selectively removing portions to create final mask patterns with different feature sizes. This segmentation allows different regions of the substrate to have different pattern densities without requiring additional photomasks, thus improving design flexibility while maintaining high integration
2Productivity
If multiple photomasks are used in SADP, SATP, or SAQP processes to achieve high integration, then the circuit integration degree is improved, but production costs increase
Solution Approach 1:
The single photomask used in this patent serves multiple functions: it defines initial mask patterns that serve as templates for subsequent conformal deposition, and through selective removal processes, it enables the creation of multiple final mask patterns with different feature sizes. This multi-functionality eliminates the need for multiple photomasks, reducing production costs while maintaining high circuit integration
3Productivity
If multiple photomasks are used in various patterning processes to increase integration, then the circuit integration degree is improved, but pattern accuracy is reduced due to the complexity of multiple lithography processes
Solution Approach 1:
The self-aligned mechanism ensures that each final mask pattern is automatically positioned with high precision relative to the initial mask patterns and other features. This self-alignment through conformal deposition eliminates the cumulative alignment errors that would otherwise occur with multiple photomasks, thereby maintaining high pattern accuracy while achieving high circuit integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process enhances design flexibility, reduces production costs, and improves pattern accuracy by allowing for patterns with different feature sizes in various regions of the substrate using fewer photomasks, thereby expanding the application range and reducing the influence of multiple lithography processes.
Implementation Method 1
An anisotropic etching process is performed using the patterned photoresist layer as a mask to remove a portion of the second mask material layer
Implementation Method 2
A first mask material layer is conformally formed on the substrate
Data Source
AI summary
A semiconductor patterning process includes the following steps. A substrate is provided, wherein the substrate has a first region, a second region, and a third region, and the second region is located between the first region and the third region. A plurality of initial mask patterns are formed on the substrate. A first mask material layer is conformally formed on the substrate. A first mask pattern is formed above at least two adjacent initial mask patterns in the second region and on the first mask material layer in between, and a second mask pattern is formed on the first mask material layer on sidewalls of remaining initial mask patterns. A portion of the first mask material layer is removed using the first mask pattern and the second mask pattern as a mask to form a final mask pattern on the substrate.