Semiconductor Patterning with Balanced Mask Pattern Densities
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Solution Overview
Problem
Existing double patterning methods for semiconductor devices face load balancing issues, leading to inconsistent geometry sizes and problems in later etching or polishing processes due to inadequate consideration of feature spacing and global pattern densities in photomask design.
Innovation Solution
A method involving the sorting and assignment of semiconductor features into subsets based on spacing, with the creation of multiple mask patterns and photomasks to achieve balanced global and local pattern densities, using algorithms to optimize feature distribution and interleave subsets to match predetermined ratios, thereby addressing load balancing challenges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography processes are used to form semiconductor features, then the manufacturing process is simple, but the geometry size cannot be reduced below a certain limit
Solution Approach 1:
The patent applies segmentation by dividing the feature set into multiple subsets based on spacing characteristics. Features are sorted into first features (spaced less than distance X apart) and second features (spaced greater than distance X apart), then further divided into subsets for different mask patterns. This segmentation enables the formation of sub-features with smaller geometry sizes that would be impossible with conventional single-step photolithography.
Solution Approach 2:
The patent introduces a new dimension to the patterning process by using multiple mask patterns (first mask pattern, second mask pattern, etc.) with different global pattern densities. Instead of attempting to form all features in a single layer, the solution distributes features across multiple mask layers, each optimized for specific spacing requirements, thereby achieving reduced geometry sizes through multi-layer patterning.
2Manufacturing precision
If existing double patterning methods are used to form small geometry features, then geometry size is reduced, but load balancing issues cause inconsistent geometry sizes
Solution Approach 1:
The patent applies local quality by assigning different global pattern densities to different mask patterns based on the specific spacing requirements of feature subsets. The first mask pattern is assigned a first global pattern density optimized for first features, while the second mask pattern is assigned a second global pattern density optimized for second features. This localized optimization ensures consistent geometry sizes for features with different spacing characteristics.
Solution Approach 2:
The patent changes the parameter of global pattern density across different mask patterns to resolve load balancing issues. By adjusting the global pattern density parameter for each mask pattern according to the spacing characteristics of the features it contains, the method achieves consistent geometry sizes and proper load balancing in subsequent etching and polishing processes.
3Reliability
If features are sorted by spacing into subsets for multiple mask patterns, then load balancing is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent applies preliminary action by pre-sorting features into subsets based on their spacing characteristics before mask pattern formation. Features are categorized as first features or second features based on whether they are spaced less than or greater than distance X apart, and then further assigned to specific subsets. This preliminary classification ensures proper load balancing is achieved before the actual patterning process begins.
Solution Approach 2:
The patent uses copying by creating multiple mask patterns that are variations of a base pattern, each optimized for specific feature subsets. Instead of modifying the base pattern for each subset, the method generates copied mask patterns with adjusted global pattern densities, simplifying the overall process while maintaining reliability through proper load balancing.
Data Source
AI summary
Provided is an apparatus for fabricating a semiconductor device. The apparatus includes a first photomask and a second photomask. The first photomask has a plurality of first features thereon, and the first photomask having a first global pattern density. The second photomask has a plurality of second features thereon, and the second photomask has a second global pattern density. The plurality of first and second features collectively define a layout image of a layer of the semiconductor device. The first and second global pattern densities have a predetermined ratio.