Semiconductor Patterning via Segmented Mask Layers
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Solution Overview
Problem
Conventional methods for forming metal gates on high-K dielectric layers in semiconductor transistors face issues with work-function mismatch, leading to performance degradation due to low precision in patterned mask layers, which affects the threshold voltage and device performance.
Innovation Solution
A method involving a base substrate with distinct regions, where a first and second filling layer and hard mask layers are formed and treated to avoid overlay alignment issues during patterning, allowing for precise formation of different work function layers, thereby improving the precision and electrical properties of the semiconductor structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional patterned mask layers are used to form different work function layers, then the manufacturing process is simple, but the patterning precision is low causing performance degradation
Solution Approach 1:
The fabrication process is divided into multiple sequential steps with separate mask formation and treatment processes for different regions. The substrate is segmented into first and second regions, each receiving tailored processing sequences, thereby achieving high precision patterning without requiring complex overlay alignments of multiple masks simultaneously.
Solution Approach 2:
Mask layers and filling layers are formed in advance before the treatment processes. The first mask layer and first filling layer are prepared on the first region, and the second mask layer and second filling layer are prepared on the second region, allowing precise patterning to be achieved through pre-positioned masks rather than complex real-time alignment.
2Adaptability or versatility
If multiple overlay alignments are performed to form different work function layers, then different threshold voltages can be achieved, but the alignment precision deteriorates causing performance degradation
Solution Approach 1:
The substrate is divided into distinct first and second regions that are processed separately. Each region has its own mask and filling layer formed independently, eliminating the need for multiple overlay alignments. This segmentation allows different threshold voltages to be achieved in different regions without compromising alignment precision.
Solution Approach 2:
Filling layers are introduced as intermediary structures between the mask layers and the substrate regions. These filling layers facilitate the formation of different work function layers in different regions without requiring direct overlay alignment of multiple masks, thereby maintaining high precision while achieving versatility in threshold voltage adjustment.
3Reliability
If conventional masking methods are used, then the fabrication process is straightforward, but the device performance deteriorates due to low precision
Solution Approach 1:
The fabrication process is segmented into distinct sequences for different substrate regions. The first region undergoes a first sequence involving first mask and filling layer formation followed by first treatment process, while the second region undergoes a second sequence. This segmentation ensures high precision patterning for each region, improving device reliability without requiring overly complex integrated processes.
Solution Approach 2:
Mask layers and filling layers are formed preliminarily before the actual treatment processes. This preliminary action ensures that precise patterns are established in advance, allowing subsequent treatment processes to be performed with high fidelity to the desired pattern, thereby improving device performance while keeping the overall process manageable.
Data Source
AI summary
Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a base substrate having a first region and a second region; forming a first filling layer on the first region of the base substrate and a first hard mask layer on the first filling layer; performing a first treatment process on the second region of the base substrate using the first hard mask layer and the first filling layer as a mask; forming a second filling layer on the first region of the base substrate and a second mask on at least the second filling layer; removing the first hard mask layer and the first filling layer to expose the first region of the base substrate and to pattern the second hard mask layer on the second filling layer; and performing a second treatment process on the first region of the base substrate.