Semiconductor Patterning with Two-Step Oxide-Selective Etching
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Solution Overview
Problem
Current semiconductor fabrication processes face challenges in achieving precise patterning of small features due to the difficulty in managing the spacing between elements, leading to issues with critical dimension control and over-etching of silicon-containing layers.
Innovation Solution
A two-step etching process is employed, where a first etchant with low selectivity is used to etch the oxide and underlayer simultaneously, followed by a second etchant with high selectivity to remove the oxide completely while minimizing over-etching of the silicon-containing layer, ensuring precise pattern formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a single etching process is used to remove oxide and etch silicon-containing layer, then the etching speed is fast, but the critical dimension control is poor and over-etching occurs
Solution Approach 1:
The patent divides the etching process into two distinct steps: a first etching process that removes oxide at a controlled rate, and a second etching process that etches the silicon-containing layer. This segmentation allows each process to be optimized independently, achieving both fast overall etching speed and precise critical dimension control by preventing over-etching into the silicon layer.
2Productivity
If the spacing between elements is reduced to increase production efficiency, then productivity increases, but the patterning precision becomes more difficult to achieve
Solution Approach 1:
The patent applies a preliminary etching step that selectively removes oxide material before the main silicon etching process. This preliminary action creates a protective effect that prevents over-etching into the silicon-containing layer, thereby maintaining high patterning precision even when elements are closely spaced for increased productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for the precise removal of the oxide layer without affecting the silicon-containing layer, resulting in well-defined patterns that meet the desired critical dimensions, thereby improving the accuracy and efficiency of semiconductor device fabrication.
Implementation Method 1
simultaneously etching the oxide and the second resist layer by performing a first etching process using a first etchant
Implementation Method 2
etching the oxide and a silicon-containing layer under the oxide by performing a second etching process using a second etchant
Data Source
AI summary
This disclosure provides methods of patterning a semiconductor structure. A first resist layer is patterned to form a first opening in the first resist layer. A second resist layer under the first resist layer is patterned to extend the first opening into the second resist layer, where a top surface of an oxide in the second resist layer is higher than a bottom surface of the first opening. The oxide and the second resist layer are simultaneously etched by a first etching process, where a first etching rate of the oxide is close to a second etching rate of the second resist layer. The oxide and a silicon-containing layer under the oxide are etched by a second etching process to form a second opening below the first opening, where a third etching rate of the oxide is higher than a fourth etching rate of the silicon-containing layer.