Semiconductor Layer Patterning With Peel-Off Polymer Through-Holes
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Solution Overview
Problem
The miniaturization of photodiodes in the semiconductor industry poses challenges in removing materials at the electrode-wire connection to avoid high resistance and in patterning semiconductor layers using emerging materials like organic semiconductors and perovskites, which are incompatible with traditional photoresist chemicals, leading to difficulties in forming stable and functional devices.
Innovation Solution
A method involving the formation of a patterned polymer layer on a substrate, with specific portions defining the location of a semiconductor layer and a conductive block, allowing for the creation of through-holes and recesses to expose electrodes and facilitate the deposition of a conductive block and package layer, while using a release layer to enhance the removal process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional lithography processes are used for patterning, then manufacturing precision can be achieved, but organic semiconductor materials and perovskite materials are decomposed by photoresist chemicals
Solution Approach 1:
The patent introduces a polymer layer as an intermediary between the substrate and the semiconductor layer. This polymer layer serves as a sacrificial mask that can be removed mechanically without exposing the organic semiconductor or perovskite materials to harmful lithography chemicals, thus protecting the materials while still enabling precise patterning
Solution Approach 2:
The patent replaces the chemical-based lithography process with a mechanical removal process. Instead of using photoresist chemicals that decompose sensitive materials, the invention uses a polymer layer that can be mechanically torn off or peeled away to create through-holes, substituting chemical action with mechanical action
2Reliability
If material is not removed at the connection between electrode and external wire, then device structure is maintained, but high resistance forms between electrode and external wire
Solution Approach 1:
The patent performs preliminary patterning of the polymer layer before depositing the semiconductor layer. The polymer layer is pre-formed with the desired pattern of through-holes and recesses, so that when the semiconductor layer is deposited and subsequently removed in these pre-defined areas, the correct connections are automatically created without requiring complex post-processing
3Productivity
If photodiode size is miniaturized, then device density increases, but material removal precision required increases
Solution Approach 1:
The patent segments the patterning process into distinct functional zones: through-holes for electrical connections, recesses for material removal, and protected areas for maintaining device structure. This segmentation allows each zone to be optimized independently for its specific function, enabling precise material removal at miniaturized dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively patterns semiconductor layers incompatible with traditional lithography processes, ensuring low resistance connections and stable device packaging by mechanically removing the patterned polymer layers and semiconductor material in a controlled manner, thus addressing the challenges of material incompatibility and miniaturization.
Implementation Method 1
the first portion of the patterned polymer layer is removed by mechanically tearing off
Implementation Method 2
A semiconductor layer is deposited on the patterned polymer layer, the substrate, and the first electrode
Implementation Method 3
A conductive block is deposited on the semiconductor layer and in the through-hole
Data Source
AI summary
A method of patterning semiconductor layer includes the following operations. A first electrode and a second electrode are formed on a substrate. A patterned polymer layer with a first portion on a portion of the second electrode and a second portion on an edge portion of the substrate is formed on the substrate. A semiconductor layer is deposited on the patterned polymer layer, the substrate, and the first electrode. The first portion of the patterned polymer layer and the semiconductor layer on the first portion are removed to form a through-hole in the semiconductor layer that exposes the portion of the second electrode. A conductive block is deposited on the semiconductor layer and in the through-hole.