Semiconductor Patterning with Sacrificial Spacers for Precision Layouts

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor manufacturing technologies face challenges in forming patterns on wafers with high precision and complexity, particularly at smaller process nodes, leading to difficulties in matching target patterns and increasing the complexity and cost of the photolithography process.

Innovation Solution

A semiconductor structure and forming method that involves creating mandrel lines, sacrificial spacers, and filling layers to define grooves and trenches, allowing for precise control of groove positions and shapes, and using cutting layers to improve pattern precision and reduce distance between pattern elements, thereby enhancing the flexibility and freedom of layout design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional photolithography methods are used to form patterns on wafers, then the manufacturing process is simpler, but the pattern precision and ability to match target patterns deteriorates at smaller process nodes

Engineering Contradiction:
Improvepattern precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patterning process is divided into multiple stages: first forming mandrel lines, then using them as templates to create sacrificial spacers, followed by forming trenches and filling layers. This segmentation allows each step to be optimized independently, achieving high pattern precision while managing overall process complexity through systematic breakdown of the manufacturing sequence

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Mandrel lines are formed in advance as sacrificial structures that define the positions of subsequent grooves and trenches. These preliminary structures serve as templates that guide the formation of the final pattern, ensuring high precision in matching target patterns before the actual functional layers are created

Inventive Principle:
Principle #10Preliminary action

2Length of moving object

If the geometric dimension is decreased to increase functional density, then the circuit size is reduced, but the difficulty and complexity in manufacturing increases

Engineering Contradiction:
Improvegeometric dimensionVSAvoidmanufacturing difficulty
Core Design Contradiction:
Length of moving objectVSEase of manufacture

Solution Approach 1:

Sacrificial spacers and filling layers are introduced as intermediary structures that facilitate the formation of small-geometry features. These intermediaries allow precise control of groove positions and shapes during the manufacturing process, making it easier to manufacture sub-10nm structures by providing physical templates and support structures that guide material deposition and removal

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transitions from two-dimensional planar patterning to three-dimensional structured formation by creating trenches with controlled depths and shapes, and by forming filling layers that extend vertically. This dimensional transition enables precise control of lateral dimensions through vertical structure geometry, allowing smaller feature sizes to be achieved with maintained manufacturing ease

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If more process steps are added to improve pattern precision, then the pattern transfer accuracy improves, but the process cost increases

Engineering Contradiction:
Improvepattern transfer accuracyVSAvoidprocess cost
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The filling layer serves multiple functions: it provides structural support during trench formation, defines the upper boundary of trenches, and acts as a sacrificial material that can be selectively removed. This multi-functionality reduces the need for separate process steps, thereby controlling process costs while maintaining high pattern transfer accuracy through the versatile role of the filling layer

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11769672B2Semiconductor structure and forming method thereof
Publication Date: 2023.09.26 SEMICON MFG INT (SHANGHAI) CORP
  • US11769672B2 patent drawing
  • US11769672B2 patent drawing
  • US11769672B2 patent drawing

AI summary

A semiconductor structure and a forming method thereof are provided. In one form, a forming method includes: forming separated mandrel lines, where opposite sidewalls of adjacent mandrel lines in a second direction are a first sidewall and a second sidewall; forming a sacrificial spacer on a sidewall of the mandrel line; forming a sacrificial layer on a part of the base between adjacent sacrificial spacers; forming a filling layer on the base; removing the sacrificial layer to form an opening; removing the sacrificial spacer to form a trench; forming a mask spacer on a sidewall of the trench, where the mask spacer is further filled between the sidewall of the mandrel line and the filling layer, and the mask spacer located on the sidewall of the trench forms a first groove; forming a second groove running through the filling layer between the sidewall of the trench and the mask spacer located on the second sidewall; removing the mandrel line to form a third groove, where a cutting layer is formed in at least one of the third groove, the second groove, and the first groove, and the cutting layer cuts the corresponding groove along the first direction; and patterning a target layer below the third groove, the second groove, and the first groove to form a target pattern. The embodiments in the present disclosure improve the pattern precision of the target pattern.