Semiconductor Patterning with Directional Etching for Sub-32 Nm Pitch
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Solution Overview
Problem
At semiconductor technology nodes of 7 nm or smaller, existing lithography techniques face challenges in achieving line-and-space patterning with pitches smaller than 32 nm due to resolution limitations, making double-patterning technologies costly for mass production.
Innovation Solution
A directional patterning technique using single-exposure patterning technology with directional etching and deposition methods, allowing for horizontal anisotropic etching and deposition to create patterns smaller than the lithography resolution limit by tuning etching and deposition parameters to achieve high selectivity and precision in pattern formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If double-patterning technology is used to achieve pitch smaller than 32 nm, then manufacturing precision is improved, but device complexity and production cost increase
Solution Approach 1:
The patent applies segmentation by dividing the patterning process into two distinct stages: first forming mandrels at a relaxed pitch using conventional lithography, then using directional etching to create the final fine-pitch pattern. This breaks down the complex task of direct fine-pitch patterning into manageable segments, achieving sub-32nm resolution without requiring complex EUV double-patterning equipment
Solution Approach 2:
The patent uses an intermediary approach by introducing sacrificial mandrels as a mediating structure. These mandrels are formed at a larger pitch using conventional lithography, then serve as templates for the final fine-pitch pattern through directional etching. The mandrels act as an intermediary that enables indirect pattern transfer, avoiding the need for direct high-resolution lithography
2Device complexity
If conventional lithography is used for patterning, then device complexity is reduced, but manufacturing precision deteriorates due to resolution limit of about 32 nm
Solution Approach 1:
The patent transitions from two-dimensional lithographic patterning to three-dimensional directional etching. By forming mandrels first and then using directional etching to create trenches between them, the process adds a vertical dimension to pattern formation. This dimensional transition enables pitch control beyond the lateral resolution limit of conventional lithography
3Manufacturing precision
If EUV lithography with double-patterning is used, then manufacturing precision is improved, but loss of energy and production cost increase
Solution Approach 1:
The patent employs disposable sacrificial mandrels that are formed using conventional, lower-cost lithography and then removed after serving their templating function. These temporary structures enable the use of inexpensive conventional lithography equipment instead of expensive EUV tools, significantly reducing capital expenditure and operational costs while achieving the required sub-32nm pitch
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the creation of patterns with pitches smaller than 32 nm without the need for double-patterning, reducing production costs and improving manufacturing efficiency for semiconductor devices.
Implementation Method 1
The first opening is expanded in a first axis by directional etching to form a first groove in the underlying layer
Implementation Method 2
A directional patterning technique using single-exposure patterning technology with directional etching and deposition methods
Data Source
AI summary
In accordance with an aspect of the present disclosure, in a pattern forming method for a semiconductor device, a first opening is formed in an underlying layer disposed over a substrate. The first opening is expanded in a first axis by directional etching to form a first groove in the underlying layer. A resist pattern is formed over the underlying layer. The resist pattern includes a second opening only partially overlapping the first groove. The underlying layer is patterned by using the resist pattern as an etching mask to form a second groove.