Semiconductor Structure With Penetrating Source Drain Contacts
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Solution Overview
Problem
The semiconductor manufacturing process is complex and costly due to the strict design rules and multiple steps involved in defining the active region, channel length, and forming conductive structures, which increases the difficulty and expense of the process.
Innovation Solution
A semiconductor structure and manufacturing method where the drain and source conductive structures are defined through a gate electrode, simplifying the process by determining the channel length and forming the gate structure and active region in a single module, thereby relaxing design rules and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the traditional multi-step process (STI/gate electrode/contacts formation) is followed to define active region and channel length, then the manufacturing precision and reliability are improved, but the device complexity and manufacturing cost increase significantly
Solution Approach 1:
The patent merges the formation of source/drain conductive structures with the gate electrode definition process. The gate electrode pattern simultaneously defines both the gate position and the source/drain regions, eliminating the need for separate STI and contact formation steps. This consolidation reduces process complexity while maintaining manufacturing precision through the self-aligned nature of the single-step process.
2Manufacturing precision
If strict design rules are enforced for STI/gate electrode/contacts formation, then the manufacturing precision is improved, but the ease of manufacture deteriorates due to higher costs and difficulty
Solution Approach 1:
The gate electrode pattern serves a dual function: it defines the gate position and simultaneously defines the source/drain regions through its pattern geometry. This self-service approach eliminates the need for separate alignment and definition steps, reducing manufacturing complexity and cost while maintaining precision through the inherent self-alignment of the process.
3Manufacturing precision
If multiple separate processes are used to form gate structure and define active region, then the manufacturing precision is improved, but the productivity deteriorates due to increased process time
Solution Approach 1:
The patent combines the gate structure formation and active region definition into a single patterning and etching process. The gate electrode pattern is formed first, and then the source/drain regions are defined in the same process step, eliminating intermediate steps and reducing overall manufacturing cycle time while maintaining precise channel area definition.
Data Source
AI summary
A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a substrate, a gate dielectric layer, a gate structure, a source conductive structure, a drain conductive structure, and a gate conductive structure. The substrate has a channel area. The gate dielectric layer is formed on the channel area, and the gate structure is formed on the gate dielectric layer. The source conductive structure and the drain conductive structure penetrate through the gate structure and are electrically connected to the substrate, and the source conductive structure and the drain conductive structure are electrically isolated from the gate structure. The gate conductive structure is formed on the gate structure. The source conductive structure and the drain conductive structure are separated by a distance which is equal to a length of the channel area.