Semiconductor Peripheral Region Layout for Lower Turn-Off Loss
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Solution Overview
Problem
The semiconductor apparatus disclosed in Japanese Patent Laying-Open No. 2016-225363 experiences high turn-off loss due to increased hole accumulation and discharge in the peripheral region during the transition from an ON state to an OFF state, leading to inefficient energy management.
Innovation Solution
The semiconductor apparatus incorporates a semiconductor substrate with a device region and a peripheral region, featuring a p collector layer that extends into the peripheral region, an n type region with varying area ratios, and an insulating region or n type region with specific electron concentrations, which reduces the forward bias voltage and internal resistance, thereby minimizing hole accumulation and discharge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the peripheral region is provided with an n type region to ensure breakdown voltage, then the reliability is improved, but the turn-off loss increases due to hole accumulation and discharge
Solution Approach 1:
The patent applies local quality by creating an n type region with a specific area ratio distribution in the peripheral region. The n type region has a first area ratio in an inner portion and a second area ratio in an outer portion, with the first area ratio being greater than the second area ratio. This non-uniform distribution optimizes the local electrical characteristics to control hole flow while maintaining breakdown voltage.
Solution Approach 2:
The patent changes the parameter of area ratio of the n type region to control hole accumulation. By setting the first area ratio (inner portion) greater than the second area ratio (outer portion), the patent optimizes the hole discharge characteristics during turn-off, reducing turn-off loss while maintaining the required breakdown voltage through the n type region configuration.
2Loss of energy
If the n type region area ratio is increased to reduce hole accumulation, then the turn-off loss is reduced, but the breakdown voltage may be compromised
Solution Approach 1:
The patent resolves this contradiction by applying local quality through spatially varying the n type region area ratio. The inner portion (closer to the device region) has a higher area ratio to effectively control hole accumulation and reduce turn-off loss, while the outer portion has a lower area ratio to maintain the electrical field distribution necessary for breakdown voltage assurance.
Solution Approach 2:
The patent segments the peripheral region into an inner portion and an outer portion with different n type region area ratios. This segmentation allows independent optimization of hole control in the inner portion and breakdown voltage maintenance in the outer portion, resolving the contradiction between reducing turn-off loss and maintaining reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces turn-off loss and recovery loss by controlling the flow of holes and electrons, enhancing the energy efficiency and operational stability of the semiconductor device.
Implementation Method 1
The n type region is in contact with the second electrode and the n buffer layer. A first area ratio of the n type region in an inner portion of the peripheral region to the n type region in the peripheral region is greater than a second area ratio of the n type region in an outer portion of the peripheral region to the n type region in the peripheral region.
Data Source
AI summary
A semiconductor apparatus includes a semiconductor substrate and a second electrode. Semiconductor substrate includes a device region and a peripheral region. An n− drift region and second electrode extend from device region to peripheral region. An n buffer layer and a p collector layer are provided also in peripheral region. Peripheral region is provided with an n type region. N type region is in contact with second electrode and n buffer layer. The turn-off loss of the semiconductor apparatus is reduced.