Multi-Layer Photoresist Patterning for Semiconductor Micro Patterns
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing degree of integration in semiconductor devices requires a reduction in minimum line width, leading to an increase in the number of process steps and mass-production costs due to methods like Double Exposure Etch Tech (DEET) and spacer formation processes.
Innovation Solution
A method is introduced to form a micro pattern in semiconductor devices by reducing the number of process steps through the formation of an etch target layer, a hard mask layer, a Bottom Anti-Reflective Coating (BARC) layer, and multiple photoresist patterns, where etch processes are used to create a hard mask pattern and ultimately the micro pattern, avoiding the need for DEET and spacer formation processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If Double Exposure Etch Tech (DEET) or spacer formation process is used to form a hard mask pattern for reduced micro line width, then the minimum line width can be reduced to achieve high integration, but the number of process steps increases and mass-production costs increase
Solution Approach 1:
The patent divides the photoresist structure into multiple layers (first photoresist layer, second photoresist layer, and third photoresist layer) with different functions. The first layer defines the basic pattern, the second layer forms spacers for dimension control, and the third layer provides additional patterning capability. This segmentation allows achieving reduced line width while maintaining process simplicity by assigning specific functions to each layer rather than using complex single-step processes.
Solution Approach 2:
The patent forms the first photoresist pattern and second photoresist pattern in advance before the etching process. These pre-formed patterns serve as masks that guide the subsequent etching steps. By preparing the photoresist structures beforehand with precise dimensional control, the method eliminates the need for complex in-process adjustments and reduces the overall number of process steps required.
2Length of moving object
If DEET or spacer formation process is used to achieve reduced micro line width, then high integration is achieved, but device mass-production costs increase
Solution Approach 1:
The patent combines multiple patterning functions into a unified multi-layer photoresist system. Instead of using separate DEET processes or spacer formation processes that would require multiple equipment steps and material applications, the invention integrates pattern definition, dimension control, and etch masking functions into a coordinated sequence of photoresist layer formations and removals, reducing overall manufacturing complexity and cost.
Solution Approach 2:
The patent uses temporary photoresist patterns (second photoresist layer and third photoresist layer) that are formed specifically for dimensional control and etch masking purposes, then removed after serving their function. These disposable photoresist structures provide precise dimensional control during manufacturing without requiring permanent or complex fixture systems, thereby reducing overall production costs.
3Device complexity
If multiple photoresist layers are formed and etched selectively, then the number of process steps is reduced, but process complexity in terms of etch selectivity requirements increases
Solution Approach 1:
The patent applies different material compositions to different photoresist layers to create localized etch selectivity. The first photoresist layer uses a composition resistant to the first etch process, the second photoresist layer is designed to be removed by the first etch process but resistant to the second etch process, and the third photoresist layer provides masking for the second etch process. This local differentiation of material properties allows selective removal and retention of specific layers without requiring complex global process changes.
Solution Approach 2:
The patent employs composite photoresist structures with different material compositions in each layer. Each photoresist layer is formulated with specific chemical compositions that provide differential etch resistance. This use of composite materials allows the multi-layer structure to withstand specific etch processes selectively, enabling the reduction of process steps while managing the complexity of etch selectivity requirements through material science rather than process complexity.
Data Source
AI summary
A method of forming a micro pattern of a semiconductor device includes forming an etch target layer, a hard mask layer, a Bottom Anti-Reflective Coating (BARC) layer and a first photoresist pattern over a semiconductor substrate. An organic layer is formed on a surface of the first photoresist pattern. A second photoresist layer is formed over the BARC layer and the organic layer. An etch process is performed so that the second photoresist layer remains on the BARC layer between the first photoresist patterns and becomes a second photoresist pattern. The organic layer on the first photoresist pattern and between the first and second photoresist patterns is removed. The BARC layer formed below the organic layer is removed. The hard mask layer is etched using the first and second photoresist patterns as an etch mask. The etch target layer is etched using a hard mask pattern as an etch mask.